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Memfault Beyond the Launch

Tranciever for ethernet

Started by Anton Erasmus October 17, 2006
Hi,

I want to do some tests to find out how well and at what rate one
might be able to transmit ethernet through a slip ring.  I have
created a fairly FPGA based random data generator with a trigger
signal which I connect to a scope, and with infinite persistence on
the scope, I can get an eye pattern on the scope. Doing this using
RS-485 and other transceivers is working well and providing good info
on what data rate one can send through the slip ring. Now I am looking
for a device or circuit with which I can generate the actual waveforms
used for 10/100  Base-TX ethernet. The typical PHY chip seems quite
complicated to set up via an FPGA using the MII interface. It also
seems to do a part of the low level ethernet protocol.  After quite a
number of hours googling, I have yet to find much info on the low
level details of ethernet. Everywhere seems to point to the IEEE spec,
which is fairly expensive, and probably contains much more than I
need.
Any pointers / suggestions on what the actual voltage levels are or
where I might find this info would be greatly appreciated.

Regards
  Anton Erasmus


Memfault Beyond the Launch