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Memfault Beyond the Launch

Failure of 68HC908KX8 Monitor Mode

Started by Jack October 7, 2004
Jack,
 I'm the owner of the MicrocontrollerWorld gropu.  There is a guy in
my group called Iceman that works a lot with the 908 and probably
knows exactly what the problem is.  Either try contacting him through
the group or just email me and I'll get you his email address after I
talk to him.  I want to respect him if he wants his privacy.   But
he's definately the guy.

Michael
> > Be advised that there are some more-specific Freescale HC08 NGs: > > http://groups.yahoo.com/group/68HC05_08/ > > http://groups.yahoo.com/group/hc08/ > > codewarrior.embedded > > also Metrowerks.com >> support >> community >> forums will lead you to a > > number of CodeWarrior forums > > > > There's also a brand-new NG that leans a bit toward Freescale: > > http://groups.yahoo.com/group/MicrocontrollerWorld/ > > > > > > They should be able to help you too. > > > > Gary > > Thank you Gary - I will follow up. > Ian, I have triple-checked my MON08 circuit to see if the pins are set > up correctly for normal monitor mode entry, and all seem fine. > I will now test my IC in a target test circuit to see if it actually > runs off the flash code. > Also, I am in constant communication with a support guy at Freescale > who is also in the process of helping me sort out this issue. > I will advise as soon as I am able to resolve this. > Regards > Jack
Jack wrote:

> Ian, I have triple-checked my MON08 circuit to see if the pins are set > up correctly for normal monitor mode entry, and all seem fine. > I will now test my IC in a target test circuit to see if it actually > runs off the flash code. > Also, I am in constant communication with a support guy at Freescale > who is also in the process of helping me sort out this issue. > I will advise as soon as I am able to resolve this.
Hi Jack, I look forward to your resolving the problem and I'm interested in what the problem is: I am out of ideas now. My own board with sockets wired up for monitor mode with the GP32, GR8, JL3, JK3, QT, QY, KX8 and JB8, all 0.1 inch pitch PDIP versions, works faultlessly with my own gnu/linux and FreeBSD software. The software identifies the processor on board, except for the JB8 so far because I haven't added a 6 MHz clock to the board yet. When I do that and write the documentation, I'm going to put all the source code on my web site under the GPL. My MC68HC705C8A programming software seems to be still very popular three years after I released it. Given that that processor is obscure, my 908 software should be even more popular. I just wish more than two people out of thousands who downloaded the software would have contacted me. Best Wishes, Ian -- Ian Stirling, G4ICV, AB2GR
> Hi Jack, > > I look forward to your resolving the problem and I'm interested > in what the problem is: I am out of ideas now. > My own board with sockets wired up for monitor mode with > the GP32, GR8, JL3, JK3, QT, QY, KX8 and JB8, all 0.1 inch > pitch PDIP versions, works faultlessly with my own gnu/linux > and FreeBSD software. The software identifies the processor on > board, except for the JB8 so far because I haven't added a 6 MHz > clock to the board yet. When I do that and write the documentation, > I'm going to put all the source code on my web site under the GPL. > My MC68HC705C8A programming software seems to be still very > popular three years after I released it. Given that that processor > is obscure, my 908 software should be even more popular. > I just wish more than two people out of thousands who downloaded > the software would have contacted me. > > Best Wishes, > Ian
Hi Ian According to Freescale it might be the absence of the 74HC125 buffers that might be the issue (I am using wired OR on the PTA0 line), as well as possibly timing between the reset pulse and the application of Vtst on IRQ line...I will check it out over the weekend and advise. Regards Jack
Jack wrote:

> Hi Ian > According to Freescale it might be the absence of the 74HC125 buffers > that might be the issue (I am using wired OR on the PTA0 line), as > well as possibly timing between the reset pulse and the application of > Vtst on IRQ line...I will check it out over the weekend and advise. > Regards > Jack
Hi Jack, My board is based on the "Simpler Monitor Mode Circuit", figure 5 in AN2317. It uses a diode instead of the 74HC125. The rest of the wiring is from the individual processors' manuals for configuring specific pins. I made a separate MAX232 board that connects to the board with five wires, the fifth to give the MAX232 V+ voltage for the Vtst voltage. It's all described in AN2317. Ian -- Ian Stirling, G4ICV, AB2GR

Memfault Beyond the Launch