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AVR TWI : extending period of the SCL

Started by Unknown July 16, 2007
The ATMega48 data sheet says that a TWI slave can extend the period of
the SCL signal produced by the TWI master :

>> "The Slave can extend the SCL low period by pulling the SCL line low."
Does anyone know of the maximum time that the period can be extended by the TWI slave? microseconds? milliseconds? seconds? some limiting factor? Thanks. -TH
daytony32@yahoo.com pisze:
> The ATMega48 data sheet says that a TWI slave can extend the period of > the SCL signal produced by the TWI master : > >>> "The Slave can extend the SCL low period by pulling the SCL line low." > > Does anyone know of the maximum time that the period can be extended > by the TWI slave?
I2C doesn't limit this period. Slave can keep SCL low as long wants. However, this will stop whole communication over bus. Best Regards AK
On Jul 16, 1:47 pm, AK <ark...@gazeta.pl> wrote:
> dayton...@yahoo.com pisze:> The ATMega48 data sheet says that a TWI slave can extend the period of > > the SCL signal produced by the TWI master : > > >>> "The Slave can extend the SCL low period by pulling the SCL line low." > > > Does anyone know of the maximum time that the period can be extended > > by the TWI slave? > > I2C doesn't limit this period. > Slave can keep SCL low as long wants. > However, this will stop whole communication over bus. > > Best Regards > AK
Many thanks for the quick response! I'll give it a whirl. - TH
"AK" <arkkar@gazeta.pl> wrote in message 
news:f7gb00$2g7$1@inews.gazeta.pl...
> daytony32@yahoo.com pisze: >> Does anyone know of the maximum time that the period can be extended >> by the TWI slave? > I2C doesn't limit this period. > Slave can keep SCL low as long wants. >
Silicon Labs includes a 25 millisecond timer for bus timeout in their SMBus hardware, but if you need that much time to ACK then I2C may not be the best choice. Jack Peacock