I2C without resistors

On Aug 23, 12:59 am, Eeyore <rabbitsfriendsandrelati...@hotmail.com>
wrote:
> Terry Given wrote:
> > absolutely. This is a pretty good example of a *really* terrible idea.
> > It saves $0.002 worth of resistors, brutally violates the I2C spec, and
> > doubtless has some interesting dynamic implications.
>
> I couldn't agree more.
>
> Why would anyone want to do this ?

If you have a really low power design, it eliminates the current
through the resistors when the bus is low.  Maybe this is not a huge
current, but it can be significant in very low power designs.

However, like DRAM, it will require periodic refreshes just by having
some bus activity if your operational activity is not frequent
enough.

On 23 aug, 14:13, rickman <gnu...@gmail.com> wrote:
> On Aug 23, 12:59 am, Eeyore <rabbitsfriendsandrelati...@hotmail.com>
> wrote:
>
> > Terry Given wrote:
> > > absolutely. This is a pretty good example of a *really* terrible idea.
> > > It saves $0.002 worth of resistors, brutally violates the I2C spec, and
> > > doubtless has some interesting dynamic implications.
>
> > I couldn't agree more.
>
> > Why would anyone want to do this ?
>
> If you have a really low power design, it eliminates the current
> through the resistors when the bus is low.  Maybe this is not a huge
> current, but it can be significant in very low power designs.

Right, It all depends.
It depends on what _is_ on that i2c bus.
For example if you only drive a PCF8574 IO expander, those are only
slaves,
and have no clock pull down transistor.
In such a case it is OK, and even better, to drive the clock from a
normal
CMOS output, and leave out the clock line pull up resistor.
Gives a better clock waveform, and less power consumption.
Same for PCF8591 etc..
I have done so, in the early days the i2c spec did not even have the
clock pull down stuff,
was only single master, and slave acknowledged by pulling sda low.

mmihai wrote:
> On Aug 22, 1:11 pm, Tauno Voipio <tauno.voi...@INVALIDiki.fi> wrote:
> 
>> Any slave is allowed to clamp the SCK line,
>> so a 'special case bus' is quite useless, or
>> at least it is not I2C anmyore. Call it then
>> something else.
> 
> It's a sub set of I2C.
> Being allowed does not mean it must to. Doc pointer: http://www.i2c-bus.org/singlemaster/
> You'll find plenty of other [software] implementations which don't
> check if SCL is high after it is released.
> 
> One can figure out from the datasheet of the devices if handshake
> (i.e. clock stretching) is needed or not.
> --
> mmihai
> 
> 
Very True.  I get call from them every so often saying Our Battery is 
defective. A very common mistake does not make it acceptable.

If the manufacture changes the chips it may stop working.
One brand of I2C bus monitor holds the clock on occasion.