clock cycle calculations

Hi all,

I am trying to calculate clock cycles per instructions by running the
test cases and monitoring the waveforms.

I am confused to calculate the cycles for memory and IO related
instructions...

For example
MOV AL,33H  ------>Took 3 clk cycles for my design
OUT 32H,AL------>Fetching and decoding takes ----10 clock cycles
 write in to memory starts after three clock cycles of fetching and
decoding  process and ends after 1 clk ending of fetching and decoding
cycles-- 8 clk cycles
 And execution takes----1 clk cycle...
HLT

my question is should i have to consider overlapping time of writing
into memory also for calculatimg clock cycle of OUT instructions??R i
should subtract the writing time???

So OUT instruction takes 10+1= 11 clock cycles or 3+1=4 clk cycles..??
which is correct..??


regards,
faz

faz wrote:
> Hi all,
> 
> I am trying to calculate clock cycles per instructions by running the
> test cases and monitoring the waveforms.
> 
> I am confused to calculate the cycles for memory and IO related
> instructions...
> 
> For example
> MOV AL,33H  ------>Took 3 clk cycles for my design
> OUT 32H,AL------>Fetching and decoding takes ----10 clock cycles
>  write in to memory starts after three clock cycles of fetching and
> decoding  process and ends after 1 clk ending of fetching and decoding
> cycles-- 8 clk cycles
>  And execution takes----1 clk cycle...
> HLT
> 
> my question is should i have to consider overlapping time of writing
> into memory also for calculatimg clock cycle of OUT instructions??R i
> should subtract the writing time???

The answer depends entirely on what you are going to do with this 
"number of clock cycles per instruction". What do you need these 
numbers for?

Perhaps you want to use these numbers to compute the total 
execution time of some longer sequence of instructions, by adding 
up the number of cycles for each instruction in the sequence?

If so, you must study how your processor overlaps the fetching and 
execution of instructions and memory and I/O accesses. That is, as 
others have already informed you, you must understand how 
instructions are pipelined and interleaved.

Only then can you define some sort of "cycles per instruction" so 
that the sum of these numbers for all the instructions in a 
sequence gives the total number of cycles for the execution of that 
sequence. Moreover, unless your processor is very simple, the 
"cycles per instruction" must either be a worst-case bound 
(over-estimate) or must depend on the neighbouring instructions in 
the sequence.

> So OUT instruction takes 10+1= 11 clock cycles or 3+1=4 clk cycles..??
> which is correct..??

You have to define the purpose of these numbers, then we can 
consider which numbers are "correct" for this purpose.

HTH,
Niklas

-- 
Niklas Holsti
Tidorum Ltd
niklas holsti tidorum fi
       .      @       .