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New sub-$2.00 60MHz Piccolo C2000 Family from Texas Instruments

Started by Bill Giovino September 9, 2008
Texas Instruments has introduced a new C2000 32-bit microcontroller family:

http://www.microcontroller.com/news/Texas_Instruments_Piccolo.asp

Codenamed Piccolo, it has the performance of a DSP with the ease-of-use of a
Microcontroller architecture. It also has an FPU - not bad!

The news article shows a C2000 roadmap

Bill Giovino
Executive Editor
http://Microcontroller.com



On Tue, 9 Sep 2008 15:41:58 -0400, Bill Giovino <contact01@microcontroller.com> wrote:
>Texas Instruments has introduced a new C2000 32-bit microcontroller family:
I'd rather eat sand than follow the recommendation of a spammer like you.
"Bill Giovino" <contact01@microcontroller.com> wrote in message 
news:ZKWdnc-wwaMSTFvVnZ2dnUVZ_rjinZ2d@comcast.com...
> Texas Instruments has introduced a new C2000 32-bit microcontroller > family: > > http://www.microcontroller.com/news/Texas_Instruments_Piccolo.asp > > Codenamed Piccolo, it has the performance of a DSP with the ease-of-use of > a > Microcontroller architecture. It also has an FPU - not bad! > > The news article shows a C2000 roadmap > > Bill Giovino > Executive Editor > http://Microcontroller.com > > >
Actually the Piccolo does NOT have an FPU - other members of the 2000 family do, but as the roadmap on the TI link shows the Piccolos are in a different path. It might not be a bad part but it only clocks at 60MHz so I would compare very carefully with low pin count ARMs (especially Cortex parts), some of which have comparable peripherals sets but all of which have much better tools. The Piccolo should win on pure DSP performance but in applications where power and micro controller features count it won't look so good. Michael Kellett
"MK" wrote...
> > "Bill Giovino" wrote... > > Texas Instruments has introduced a new C2000 32-bit microcontroller > > family: > > > > http://www.microcontroller.com/news/Texas_Instruments_Piccolo.asp > > > > Codenamed Piccolo, it has the performance of a DSP with the ease-of-use of > > a > > Microcontroller architecture. It also has an FPU - not bad! > > > > The news article shows a C2000 roadmap > > > > Bill Giovino > > Executive Editor > > http://Microcontroller.com > > > > > > > > Actually the Piccolo does NOT have an FPU - other members of the 2000 family > do, but as the roadmap on the TI link shows the Piccolos are in a different > path.
Hi, Mike, nice to see someone else who remembers FPUs! The Piccolo's has a peripheral called a Control Law Accelerator (CLA). The CLA has hardcoded algorithms, and the algorithms are executed via an FPU that is part of the CLA. But the CLA is not designed to be used as a general-purpose FPU without specific help from TI and in my conference call with TI I hammered at that particular point.
> > It might not be a bad part but it only clocks at 60MHz so I would compare > very carefully with low pin count ARMs (especially Cortex parts), some of > which have comparable peripherals sets but all of which have much better > tools.
Mike, after reading your above comments today, I updated my article with the following text which can be found in the 3rd paragraph: "A glance at the industry standard Dhrystone benchmarks for this core show that, when compared to a 72MHz ARM Cortex M3, a 60MHz Piccolo performs 25% faster while executing "general purpose" code, and up to 38% faster while executing "control algorithm" (PIC32) code. The Piccolo is, of course, expected to be significantly faster than any conventional microcontroller architecture when executing any sophisticated math code."
> The Piccolo should win on pure DSP performance but in applications where > power and micro controller features count it won't look so good.
I agree - I wouldn't expect any sophisticated math core to surprise me with low power. But low power applications do not appear to be TI's target for the C2000. However, the I/O configuration on the C2000 is specifically designed to be what you are used to seeing in any conventional microcontroller, so it can easily be used as a general purpose microcontroller (although that might be overkill for a purely I/O-control application). The low power Cortex core winner is ST's STM32, which draws a ridiculously low 36mA at 72MHz: http://www.microcontroller.com/news/arm_cortex_stm.asp (Hands down, the STMicroelectronics STM32 appears to be dominating the Cortex marketplace for any high volume application.) Thanks for your comments, - Bill Giovino Executive Editor http://Microcontroller.com
> The Piccolo's has a peripheral called a Control Law Accelerator (CLA). The CLA has > hardcoded algorithms, and the algorithms are executed via an FPU that is part of the > CLA.
Can you tell me what algorithms exactly are encoded by the CLA ? Thanks, -- Boo
"Bill Giovino" <contact01@microcontroller.com> skrev i meddelandet 
news:g6OdndLUw6W1YVrVnZ2dnUVZ_v_inZ2d@comcast.com...
> "MK" wrote... >> >> "Bill Giovino" wrote... >> > Texas Instruments has introduced a new C2000 32-bit microcontroller >> > family:
[snip]
> Mike, after reading your above comments today, I updated my article with > the following > text which can be found in the 3rd paragraph: >
The following statement may need a review: "The Piccolo is, of course, expected to be significantly faster than any conventional microcontroller architecture when executing any sophisticated math code." The AVR32 with it's single cycle MAC is also "significantly faster than any conventional microcontroller architecture" on DSP algorithms.' -- Best Regards, Ulf Samuelsson This is intended to be my personal opinion which may, or may not be shared by my employer Atmel Nordic AB
Hi, 
I better introduce myself, my name is Alex Tessarolo, I am the C2000
product line architect so this way you know that I am totally unbiased ;-)

I would like to comment on the CLA and power consumption topics brought
up.

The CLA is actually fully programmble FPU. More details will be made
available over time. 

Initially we will support the CLA with TI supplied algorithms (kind of
piece together software building blocks). Thats where the "hardcoded"
terminology came in (maybe not be the most appropriate terminology). Then
we will support full programmability with appropraite tools. Full
programmability may come out in conjunction with the hardcoded blocks or
soon thereafter, we are still working out details.

We are using this approach because we have users, one example: those
transitioning from analog to digital power supplies, that have a steep
learning curve and hence we want to make the initial step as easy as
possible.

The CLA itself is essentially a stripped down version of the FPU on our
F2833x devices and made it work independently of the C28 CPU. It can
directly access peripherals such as the ADC and PWM and respond to
interrupts directly without CPU intervention. You could almost say that the
Piccolo devices, with CLA, are dual core devices.

Why the CLA? Two main reasons, improve performance and reduce power. The
performance we are targeting here is not solely your traditional how many
MIPS/MFLOPS but quality of MIPS and response time. In particular, some
applications, like digital power, look at "interrupt jitter" and "sample to
output delay" as performance parameters. If you have a single CPU handling
the control loops + communication tasks and such, it is very challanging to
manage interrupt jitter and respond rapidly to real time tasks. By adding
the CLA, it offloads the CPU from performing the time critical tasks and
interrupts are serviced faster and more predictably. So the overall system
performance goes up significantly.

We use floating-point? because we get a better quality of MIPS and its
just plain easier to program in floating-point. The CLA can exeute (Y =
M*X+B) in 5 cycles, that includes reading the values from memory and
storing the result back to memory. It can do division (i.e. 1.234/13.765 =
0.0896476) in 11 cycles, again reading the values from memory and writing
back and so on. The CLA has about on average a 2x performance advantage
over the C28 CPU on math tasks. So even though Piccolo is a 60MHz device,
with the CLA, the overall system performance is much higher.

On the power aspect, quality of MIPS is not often factored in such
discussions or the energy consumption (average mW over a given time). For
example: If I am running a control loop on the CLA and it only takes a
quarter as many cycles to execute, then say on an Cortex-M3 based device,
then I have two options: I can run Piccolo at say a quarter of the MHz and
hence reduce the power or run Piccolo at full speed and turn off the CLA
for 75% of the time. The CLA in fact automatically shuts down when its task
is complete. Basically, performance and power are interdependent.

We have applications where we do just that and even though the data sheet
may specify a Max power number, it doesn't factor in the above. So
comparing power between devices is complex. Its even more complicated by
the fact that power is also measured differently by different devices.
Running an intense math task will result in different power numbers then
running say a Dhrystone benchmark (Dhrystone does not do any math, or
insignificant amount). So comparing data sheet power numbers is not always
an apples for apples comparison and this level of detail is not always made
available or apparant.

Anyway, I probably rambled for too long. I hope anyway the above sheds
some light in our thought process.

Cheers,
Alex T.


On 2008-09-11, Alex T. <a-tessarolo@ti.com> wrote:
> > I better introduce myself, my name is Alex Tessarolo, I am the C2000 > product line architect so this way you know that I am totally unbiased ;-)
Is the JTAG support as completely messed and non-standard as the MSP320, or did you guys actually follow the IEEE standard this time around? s debugging info available for the C2000 so that open-source and third-party tools will work, or is it all top-secret with several sub-families only partially supported like the MSP430? -- Grant Edwards grante Yow! Now, let's SEND OUT at for QUICHE!! visi.com
"Ulf Samuelsson" wrote...
:> The following statement may need a review:
> > "The Piccolo is, of course, expected to be significantly faster than any > conventional microcontroller architecture when executing any sophisticated math code." > > The AVR32 with it's single cycle MAC is also "significantly faster than any > conventional microcontroller architecture" on DSP algorithms.'
While a microcontroller with a MAC (Multiply Accumulate Unite) is of course available, that core configuration is not what I would call a "conventional microcontroller". -Bill.
On Sep 11, 9:24=A0am, "Alex T." <a-tessar...@ti.com> wrote:
> Hi, > I better introduce myself, my name is Alex Tessarolo, I am the C2000 > product line architect so this way you know that I am totally unbiased ;-=
)
> > I would like to comment on the CLA and power consumption topics brought > up. > > The CLA is actually fully programmble FPU. More details will be made > available over time.
...snip...
> Anyway, I probably rambled for too long. I hope anyway the above sheds > some light in our thought process. > > Cheers, > Alex T.
Thanks for the intro. So for the short term, it sounds like the CLA will be used a bit like the PSOC programmable analog is used, only the functions provided by TI are supported. Are the supported CLA functions documented at this time? I think that was the question that Boo was actually asking. It looks like these parts are still *very* preliminary. Any idea when they will be shipping in volume? Rick