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For those following the Block RAM saga, the answer seems to be that I have my clock edges the wrong way round. I got RAMB4_S8 working as a ROM on my 6800 design by reversing the clock edges. I also managed to simulate block RAM by including the unisim library in the file referencing RAMB4.... Another bit of good news is that I have got a 6809 VHDL core running the SBUG monitor program on Tony Burch's B5X300 300K gate Spartan2+. I have not fully tested it, but initially it is looking quite promising. I'm using some of the older B3 modules with it. The code is on my web page: http://members.optushome.com.au/jekent/system09/index.html Its still using slice ROM. I have to reverse the clock edges on the 6809 design to properly use the RAMB4 modules. John. -- http://members.optushome.com.au/jekent |
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6809 VHDL Core running
Started by ●September 5, 2003
Reply by ●September 5, 20032003-09-05
