Herbert:

Yes, I did, thank you for your comment.

I checked twice, the pins SEL1,SEL2 are both grounded, which indicates 8080 
mode.  I will check again to double check.  The reference design that I am 
using here originally had a NOT gate for the WR/RD signals so that they 
were always opposite each other, and then combined with an OR gated with CS 
(so WR/RD could only ever go low if CS was also low).  I have since removed 
these chips because I thought that they were causing part of the problem, 
but the behaviour is the same no matter what.  Maybe I'll try forcing it to

6800 mode and see if it works any different.  Maybe I need to add a 
decoupling cap close to SEL1 or something.  Come to think of it, why are 
there 2 SEL pins if both configurations have SEL2 tied low?

Thanks for the suggestions.

-- Sean

At 12:09 2/16/2006, you wrote:
>Sean,
>
>did you read my comment about the 6800 and 8080 mode - resp. did you check
>if you are running the correct mode?
>
>Herbert
>
>At 12:04 16.02.2006 -0500, you wrote:
>
> >Thanks for the comment Glen,
> >
> >I checked the timing with an Oscilloscope and it's fine.  The
pulses stay
> >for about 500nS (I'm using legacy GPIO mapping so it's
slower).  A complete
> >write cycle takes 940nS.  If anything I think it may be too slow, but
I've
> >seem this used with a 8051 (much slower) without any issues,
unfortunately
> >I don't have the source code for that.  Maybe I'll try using
FGPIO and see
> >if that makes a difference.
> >
> >Does anyone know of any alternatives to SED13305 (that's cheap?)
> >
> >Thanks!
> >
> >-- Sean
> >
> >At 07:15 2/16/2006, you wrote:
> > >Sean,
> > >
> > >I have used the SED 1335 in the past.  One thing that is too
> > >obvious is that the SED part is probably not the fastest thing
> > >in the world, and you may be exceeding it speed capability.
> > >
> > >I never had this problem with the Z80 family I was using at the
> > >time, but the new ARM chips are way too fast for the 1335, I do
not
> > >know about the chip you are using.
> > >
> > >Just a thought.
> > >
> > >Glen
> > >
> > >
> > >Sean wrote:
> > >
> > > > Hello all,
> > > >
> > > > I am having an issue here and I hope someone has some
suggestions.  I'm
> > > > trying to interface some LCDs to my micro, I have a
graphical 128x64
> > which
> > > > has an embedded controller chip interfaced fine, using
P1.16-P1.23 as
> > > 8-bit
> > > > parallel IO.  However when I try to hook up a SED13305 the
data 
> seems to
> > > > get corrupted.  I'll issue a write to the device to
store something in
> > > > VRAM, then immediately try to read it back.  Here's
where things get
> > weird.
> > > >
> > > > If I try to use the WR and RD signals like they should be
used (RD 
> always
> > > > high, Clear WR, Set Byte, Set WR), the write appears to
work, however
> > > > repeated reads of the same memory area return different
results each
> > > > time.  Enough reads show that the data was written 
> successfully.  However
> > > > if I modify only the write routine to use the WR and RD
signals in a
> > > > different (wrong) way (Clear WR, Set RD, Set Byte, Set WR,
Clear 
> RD) then
> > > > repeated reads return the same data every time, however bits
7:8 are
> > > always
> > > > "10".  Note that the read routine is the exact
same both times.
> > > >
> > > > How is it possible to have a small change to the write
routine 
> effect how
> > > > the read routine works?
> > > >
> > > > I have tried playing with timing to no avail.  I looked at
everything
> > with
> > > > an oscilloscope and the timing and data look correct. 
I've 
> verified all
> > > > connections with a multimeter. I have both the micro and the
SED 
> running
> > > > off of 3.3V.  Note that if the SED is running at 5V then I
get complete
> > > > garbage on read (meaning probably nothing worked), even
though the SED
> > > says
> > > > it works from 2.7V to 5.5V.
> > > >
> > > > I think I'm going to have to try to make another test
board, but 
> before I
> > > > run out to do that does anyone have any ideas as to why this
is
> > happening?
> > > >
> > > > Thanks,
> > > >
> > > > -- Sean
> > > >
> > > >
> > > >
> > > >
> > > >
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Sean,

At 12:22 16.02.2006 -0500, you wrote:
>Herbert:
>
>Yes, I did, thank you for your comment.

I just was unsure if you read my comment.
	>I checked twice, the pins SEL1,SEL2 are both grounded, which indicates 8080
>mode.  I will check again to double check.  The
reference design that I am
>using here originally had a NOT gate for the WR/RD signals so that they
>were always opposite each other, and then combined with an OR gated with CS
>(so WR/RD could only ever go low if CS was also low).  I have since removed
>these chips because I thought that they were causing part of the problem,
>but the behaviour is the same no matter what.  Maybe I'll try forcing
it to
>6800 mode and see if it works any different.  Maybe I need to add a
>decoupling cap close to SEL1 or something.  Come to think of it, why are
>there 2 SEL pins if both configurations have SEL2 tied low?

I assume this is because of upwards compatibility.

Basically you even can tie the CS\ to GND and use RD\, WR\, A0, and D0...D7 
only. There is no maximum lenght for the RD\ and WR\ pulses (it even works 
on single stepping the uC and toggling the line with portio i/o functions).

I just wonder why you are using the S1D13305 (I think this is the correct 
name, the old name was SED1335), this chip normally is used for LCMs > 
128x64 only. A typical display controller for 128x64 is KS107/108 (although 
they are very slow). In the most cases (all cases I'm aware of if we speak 
about 128x64) you have the correct chip already on the LCM.

Regards
Herbert
	>Thanks for the suggestions.
>
>-- Sean
>
>At 12:09 2/16/2006, you wrote:
> >Sean,
> >
> >did you read my comment about the 6800 and 8080 mode - resp. did you
check
> >if you are running the correct mode?
> >
> >Herbert
> >
> >At 12:04 16.02.2006 -0500, you wrote:
> >
> > >Thanks for the comment Glen,
> > >
> > >I checked the timing with an Oscilloscope and it's fine.  The
pulses stay
> > >for about 500nS (I'm using legacy GPIO mapping so it's
slower).  A 
> complete
> > >write cycle takes 940nS.  If anything I think it may be too slow,
but I've
> > >seem this used with a 8051 (much slower) without any issues,
unfortunately
> > >I don't have the source code for that.  Maybe I'll try
using FGPIO and see
> > >if that makes a difference.
> > >
> > >Does anyone know of any alternatives to SED13305 (that's
cheap?)
> > >
> > >Thanks!
> > >
> > >-- Sean
> > >
> > >At 07:15 2/16/2006, you wrote:
> > > >Sean,
> > > >
> > > >I have used the SED 1335 in the past.  One thing that is too
> > > >obvious is that the SED part is probably not the fastest
thing
> > > >in the world, and you may be exceeding it speed capability.
> > > >
> > > >I never had this problem with the Z80 family I was using at
the
> > > >time, but the new ARM chips are way too fast for the 1335, I
do not
> > > >know about the chip you are using.
> > > >
> > > >Just a thought.
> > > >
> > > >Glen
> > > >
> > > >
> > > >Sean wrote:
> > > >
> > > > > Hello all,
> > > > >
> > > > > I am having an issue here and I hope someone has some 
> suggestions.  I'm
> > > > > trying to interface some LCDs to my micro, I have a
graphical 128x64
> > > which
> > > > > has an embedded controller chip interfaced fine, using
P1.16-P1.23 as
> > > > 8-bit
> > > > > parallel IO.  However when I try to hook up a SED13305
the data
> > seems to
> > > > > get corrupted.  I'll issue a write to the device
to store 
> something in
> > > > > VRAM, then immediately try to read it back. 
Here's where things get
> > > weird.
> > > > >
> > > > > If I try to use the WR and RD signals like they should
be used (RD
> > always
> > > > > high, Clear WR, Set Byte, Set WR), the write appears to
work, however
> > > > > repeated reads of the same memory area return different
results each
> > > > > time.  Enough reads show that the data was written
> > successfully.  However
> > > > > if I modify only the write routine to use the WR and RD
signals in a
> > > > > different (wrong) way (Clear WR, Set RD, Set Byte, Set
WR, Clear
> > RD) then
> > > > > repeated reads return the same data every time, however
bits 7:8 are
> > > > always
> > > > > "10".  Note that the read routine is the
exact same both times.
> > > > >
> > > > > How is it possible to have a small change to the write
routine
> > effect how
> > > > > the read routine works?
> > > > >
> > > > > I have tried playing with timing to no avail.  I looked
at everything
> > > with
> > > > > an oscilloscope and the timing and data look correct. 
I've
> > verified all
> > > > > connections with a multimeter. I have both the micro
and the SED
> > running
> > > > > off of 3.3V.  Note that if the SED is running at 5V
then I get 
> complete
> > > > > garbage on read (meaning probably nothing worked), even
though 
> the SED
> > > > says
> > > > > it works from 2.7V to 5.5V.
> > > > >
> > > > > I think I'm going to have to try to make another
test board, but
> > before I
> > > > > run out to do that does anyone have any ideas as to why
this is
> > > happening?
> > > > >
> > > > > Thanks,
> > > > >
> > > > > -- Sean
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
>http://docs.yahoo.com/info/terms/>http://docs.yahoo.com/info/terms/>Yahoo!" target="_blank" rel="nofollow">http://docs.yahoo.com/info/terms/>http://docs.yahoo.com/info/terms/>http://docs.yahoo.com/info/terms/>Yahoo!

>
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