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LPC2148 IAP, Strange Behaviour

Started by Shahzeb Ihsan July 31, 2006
Hi,
I'm trying to enter IAP mode for LPC2148. At the moment I'm not trying
to do anything extensive, just want to get a basic setup working. I've
looked through the message archives but wasn't able to figure out the
problem.

The problem is, whenever I call the function which should (supposedly)
jump to the IAP thumb code, I see strange behaviour (described below).
I am using ADS 1.2 and the bootloader version is 2.11 (as read by the
Phillips ISP utility). I am using the following settings:

1.) Top Of Stack -> 0x40007000
2.) Heap Base -> 0x40001000
3.) Interrupts disabled (in all modes using the I/F bits in CPSR)

I'm using the same scheme as shown in the user manual.i.e:

#define IAP_ENTRY 0x7FFFFFF1 // IAP entry point
typedef void(*IAP)(uINT uiCommand[], uINT uiResult[]);
IAP EnterIAP;

EnterIAP = (IAP)IAP_ENTRY;

uiCmd[0] = 50;
uiCmd[1] = 10;
iCmd[2] = 15;
uiCmd[3] = 0;
uiCmd[4] = 0;

uiResult[0] = 0;
uiResult[1] = 0;

EnterIAP(uiCmd, uiResult);

Initially I was getting "Undefined Instruction" exceptions, so I
disabled the initialization of PLL0, VPBDIV and MAM. I also set MEMMAP
to 0x01 and disabled PLL0. Now when I step through the code at the
point "EnterIAP" is called, I see the following disassembly:

0x7FFFFFF0 F7FEB580 LDR??B R11,[R14,R0,LSL #11]!
0x7FFFFFF4 BC80FA63 STCLT p10,CPC,[R0],{99}
0x7FFFFFF8 4718BC08 LDRMI R11,[R8,-R8,LSL #24]
0x7FFFFFFC FFFFFFFF SWI?? 0x00FFFFFF
0x80000000 E3A00000 MOV R0,#0x00000000

...and then the code gets stuck in either the SWI handler or FIQ
handler (I'm using infinite loops as dummy handlers).

I'd be really greatful if someone could help me out here. Since I'm
only trying to prepare a few sectors for reading, I don't think I need
to pass the clock frequency as a paramter (right!?).

Regards,
Shahzeb

An Engineer's Guide to the LPC2100 Series

Hi Again,

Problem solved. Now this is a little embarrassing, I hadn't turned on
ARM/Thumb interworking and since IAP is Thumb code, my IAP call was
wreaking havoc with program execution. Thanks anyway!

Regards,
Shahzeb

--- In l..., "Shahzeb Ihsan" wrote:
>
> Hi,
> I'm trying to enter IAP mode for LPC2148. At the moment I'm not trying
> to do anything extensive, just want to get a basic setup working. I've
> looked through the message archives but wasn't able to figure out the
> problem.
>
> The problem is, whenever I call the function which should (supposedly)
> jump to the IAP thumb code, I see strange behaviour (described below).
> I am using ADS 1.2 and the bootloader version is 2.11 (as read by the
> Phillips ISP utility). I am using the following settings:
>
> 1.) Top Of Stack -> 0x40007000
> 2.) Heap Base -> 0x40001000
> 3.) Interrupts disabled (in all modes using the I/F bits in CPSR)
>
> I'm using the same scheme as shown in the user manual.i.e:
>
> #define IAP_ENTRY 0x7FFFFFF1 // IAP entry point
> typedef void(*IAP)(uINT uiCommand[], uINT uiResult[]);
> IAP EnterIAP;
>
> EnterIAP = (IAP)IAP_ENTRY;
>
> uiCmd[0] = 50;
> uiCmd[1] = 10;
> iCmd[2] = 15;
> uiCmd[3] = 0;
> uiCmd[4] = 0;
>
> uiResult[0] = 0;
> uiResult[1] = 0;
>
> EnterIAP(uiCmd, uiResult);
>
> Initially I was getting "Undefined Instruction" exceptions, so I
> disabled the initialization of PLL0, VPBDIV and MAM. I also set MEMMAP
> to 0x01 and disabled PLL0. Now when I step through the code at the
> point "EnterIAP" is called, I see the following disassembly:
>
> 0x7FFFFFF0 F7FEB580 LDR??B R11,[R14,R0,LSL #11]!
> 0x7FFFFFF4 BC80FA63 STCLT p10,CPC,[R0],{99}
> 0x7FFFFFF8 4718BC08 LDRMI R11,[R8,-R8,LSL #24]
> 0x7FFFFFFC FFFFFFFF SWI?? 0x00FFFFFF
> 0x80000000 E3A00000 MOV R0,#0x00000000
>
> ...and then the code gets stuck in either the SWI handler or FIQ
> handler (I'm using infinite loops as dummy handlers).
>
> I'd be really greatful if someone could help me out here. Since I'm
> only trying to prepare a few sectors for reading, I don't think I need
> to pass the clock frequency as a paramter (right!?).
>
> Regards,
> Shahzeb
>

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