Hi All,
1) I'm working on the IAR Kickstart PC2148 kit and I'm facing
problems
to configure correctly the different UARTs regarding the fractional
baud rate feature...
I have looked at the user manual which gives only a big formula and an
example @20MHz but not how to compute the correct MULDIV DIVADDVAL for
a dedicated baud rate and frequency CCLK.
2) I would like to know what is the max baudrate at 60MHz? Is it
3.750Mbits only?
Can you help me please?
Thanks a lot in advance
LPC2148 UART Fractional baud Rate and Maximal baudrate
Started by ●February 21, 2007
Reply by ●February 21, 20072007-02-21
---- Original Message ----
From: "croquettegnu"
To:
Sent: Wednesday, February 21, 2007 9:05 AM
Subject: [lpc2000] LPC2148 UART Fractional baud Rate and Maximal
baudrate
> 1) I'm working on the IAR Kickstart PC2148 kit and I'm facing problems
> to configure correctly the different UARTs regarding the fractional
> baud rate feature...
> I have looked at the user manual which gives only a big formula and an
> example @20MHz but not how to compute the correct MULDIV DIVADDVAL for
> a dedicated baud rate and frequency CCLK.
The manual gives the formula
baudrate = (normal baudrate) * mulval / (mulval+divaddval)
The fractional baudrate generator is a way to reduce the baudrate by 0-50%.
I don't think there is a simple formula to get the optimum values of
divisor, mulval, and divaddval, but since mulval and divaddval only can be
integers 1-15 and 0-15 respectively, there aren't that many combinations to
try. The file area contains at least one baudrate calculator program that
(I guess) tries all combinations and reports the best values.
Note that the LPC236x manual says that when using the fractional baudrate
generator, the divisor (UnDLL, UnDLH) must be >= 2. The manuals for the
older chips don't say that, but this limitation most likely applies for
LPC213x, LPC214x, and LPC2101/2/3 also, since several people have had
problems with the fractional baudrate generator at very high baudrates.
> 2) I would like to know what is the max baudrate at 60MHz? Is it
> 3.750Mbits only?
Yes. For asynchronous serial communication, 3.75 Mbps is quite fast.
Maxim's fastest RS232 transceiver only goes to 1.5 Mbps. Neither the RS232
transceiver on your LPC2148 board, nor PCs or anything else in the other end
will likely support such speeds.
You might be able to use 3.75 Mbps through RS422/485, or a direct TTL
connection to another chip on the same board. But the LPC2xxx UARTs aren't
really suited for those speeds with their short FIFOs and no DMA modes.
Karl Olsen
From: "croquettegnu"
To:
Sent: Wednesday, February 21, 2007 9:05 AM
Subject: [lpc2000] LPC2148 UART Fractional baud Rate and Maximal
baudrate
> 1) I'm working on the IAR Kickstart PC2148 kit and I'm facing problems
> to configure correctly the different UARTs regarding the fractional
> baud rate feature...
> I have looked at the user manual which gives only a big formula and an
> example @20MHz but not how to compute the correct MULDIV DIVADDVAL for
> a dedicated baud rate and frequency CCLK.
The manual gives the formula
baudrate = (normal baudrate) * mulval / (mulval+divaddval)
The fractional baudrate generator is a way to reduce the baudrate by 0-50%.
I don't think there is a simple formula to get the optimum values of
divisor, mulval, and divaddval, but since mulval and divaddval only can be
integers 1-15 and 0-15 respectively, there aren't that many combinations to
try. The file area contains at least one baudrate calculator program that
(I guess) tries all combinations and reports the best values.
Note that the LPC236x manual says that when using the fractional baudrate
generator, the divisor (UnDLL, UnDLH) must be >= 2. The manuals for the
older chips don't say that, but this limitation most likely applies for
LPC213x, LPC214x, and LPC2101/2/3 also, since several people have had
problems with the fractional baudrate generator at very high baudrates.
> 2) I would like to know what is the max baudrate at 60MHz? Is it
> 3.750Mbits only?
Yes. For asynchronous serial communication, 3.75 Mbps is quite fast.
Maxim's fastest RS232 transceiver only goes to 1.5 Mbps. Neither the RS232
transceiver on your LPC2148 board, nor PCs or anything else in the other end
will likely support such speeds.
You might be able to use 3.75 Mbps through RS422/485, or a direct TTL
connection to another chip on the same board. But the LPC2xxx UARTs aren't
really suited for those speeds with their short FIFOs and no DMA modes.
Karl Olsen
Reply by ●February 21, 20072007-02-21
--- In l..., "Karl Olsen" wrote:
> Note that the LPC236x manual says that when using the fractional
baudrate
> generator, the divisor (UnDLL, UnDLH) must be >= 2. The manuals for the
> older chips don't say that, but this limitation most likely applies for
> LPC213x, LPC214x, and LPC2101/2/3 also, since several people have had
> problems with the fractional baudrate generator at very high baudrates.
Hi Karl,
Do you know for sure that the >=2 limitation applies *only* if you are
using FBG?
I just checked and SILL autobauds on LPC2292 with PCLK.7456 up to
921600 baud. Thus divisor count of 1 works on this variant (and I
suspect others) without FBG.
I have had some report they can reach only half this value and I am
wondering if this is because FBG on these devices are somehow being
enabled after reset or if this is a penalty for just having FBG.
Regards,
Jaya
> Note that the LPC236x manual says that when using the fractional
baudrate
> generator, the divisor (UnDLL, UnDLH) must be >= 2. The manuals for the
> older chips don't say that, but this limitation most likely applies for
> LPC213x, LPC214x, and LPC2101/2/3 also, since several people have had
> problems with the fractional baudrate generator at very high baudrates.
Hi Karl,
Do you know for sure that the >=2 limitation applies *only* if you are
using FBG?
I just checked and SILL autobauds on LPC2292 with PCLK.7456 up to
921600 baud. Thus divisor count of 1 works on this variant (and I
suspect others) without FBG.
I have had some report they can reach only half this value and I am
wondering if this is because FBG on these devices are somehow being
enabled after reset or if this is a penalty for just having FBG.
Regards,
Jaya
Reply by ●February 26, 20072007-02-26
--- In l..., "jayasooriah" wrote:
>
> --- In l..., "Karl Olsen" wrote:
>> Note that the LPC236x manual says that when using the fractional
>> baudrate generator, the divisor (UnDLL, UnDLH) must be >= 2. The
>> manuals for the older chips don't say that, but this limitation
>> most likely applies for LPC213x, LPC214x, and LPC2101/2/3 also,
>> since several people have had problems with the fractional
>> baudrate generator at very high baudrates.
>
> Do you know for sure that the >=2 limitation applies *only* if you
> are using FBG?
No, I haven't used divisor=1 myself.
See http://tech.groups.yahoo.com/group/lpc2000/message/12520
> I just checked and SILL autobauds on LPC2292 with PCLK.7456 up to
> 921600 baud. Thus divisor count of 1 works on this variant (and I
> suspect others) without FBG.
This is likely when the bug is in the FBG. I guess that Philips used
an existing 16C550 core, and then later added the FBG, so bugs are
more likely in the FBG. (This doesn't explain the FIFO=0 bug though.)
> I have had some report they can reach only half this value and I am
> wondering if this is because FBG on these devices are somehow being
> enabled after reset or if this is a penalty for just having FBG.
Could also be limitations in the RS232 drivers, or too long cables.
Karl Olsen
>
> --- In l..., "Karl Olsen" wrote:
>> Note that the LPC236x manual says that when using the fractional
>> baudrate generator, the divisor (UnDLL, UnDLH) must be >= 2. The
>> manuals for the older chips don't say that, but this limitation
>> most likely applies for LPC213x, LPC214x, and LPC2101/2/3 also,
>> since several people have had problems with the fractional
>> baudrate generator at very high baudrates.
>
> Do you know for sure that the >=2 limitation applies *only* if you
> are using FBG?
No, I haven't used divisor=1 myself.
See http://tech.groups.yahoo.com/group/lpc2000/message/12520
> I just checked and SILL autobauds on LPC2292 with PCLK.7456 up to
> 921600 baud. Thus divisor count of 1 works on this variant (and I
> suspect others) without FBG.
This is likely when the bug is in the FBG. I guess that Philips used
an existing 16C550 core, and then later added the FBG, so bugs are
more likely in the FBG. (This doesn't explain the FIFO=0 bug though.)
> I have had some report they can reach only half this value and I am
> wondering if this is because FBG on these devices are somehow being
> enabled after reset or if this is a penalty for just having FBG.
Could also be limitations in the RS232 drivers, or too long cables.
Karl Olsen
