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Remap vectors to RAM and GDB debugging???

Started by Ken June 22, 2004
Hi,

I am debugging an LPC2106 using arm-elf-insight with a WIGGLER and
cannot get the software interrupt to work correctly.

I am running from RAM and can successfully step through the code, but
have a problem with the SWI instruction.

I have setup the vector table at 0x40000000 as follows:

(gdb) disassemble 0x40000000 0x40000020
Dump of assembler code from 0x40000000 to 0x40000020:
0x40000000 <$a+0>: b 0x40002438 <start>
0x40000004 <$a+4>: b 0x400024a0 <endless_loop>
0x40000008 <$a+8>: b 0x40001480 <SWI_Handler>
0x4000000c <$a+12>:b 0x400024a0 <endless_loop>
0x40000010 <$a+16>:b 0x400024a0 <endless_loop>
0x40000014 <$a+20>:b 0x400024a0 <endless_loop>
0x40000018 <$a+24>:b 0x400024a0 <endless_loop>
0x4000001c <$a+28>:b 0x400024a0 <endless_loop>

I have also set the MEMMAP register to 2, which I think should remap
the vector table from flash to RAM. The vector table in flash is as follows - I have not set this up it's
just what was there:

(gdb) disassemble 0 0x20
Dump of assembler code from 0x0 to 0x20:
0x00000000: ldr pc, [pc, #24] ; 0x20
0x00000004: ldr pc, [pc, #24] ; 0x24
0x00000008: ldr pc, [pc, #24] ; 0x28
0x0000000c: ldr pc, [pc, #24] ; 0x2c
0x00000010: ldr pc, [pc, #24] ; 0x30
0x00000014: nop (mov r0,r0)
0x00000018: ldr pc, [pc, #24] ; 0x38
0x0000001c: ldr pc, [pc, #24] ; 0x3c
End of assembler dump.

When the SWI instruction executes I can see the PC getting set to 8.
My understanding is that with the MEMMAP instruction set to 2, the
program should actually read from 0x40000008, but stepping through
the next instruction shows that the vector table in flash is actually
being used.

Any help on this matter gratefully appreciated. What am I doing
wrong?

Regards,
Richard.



An Engineer's Guide to the LPC2100 Series


> My understanding is that with the MEMMAP instruction set to 2, the
> program should actually read from 0x40000008, but stepping through
> the next instruction shows that the vector table in flash is
actually
> being used.


Some progress - but still problems:

Now I seem to use the correct vector, but the branch is to a
truncated address.

Instead of seeing a

b 0x400014b4

instruction I see a

b 0x14b4

instruction. The 0x40000000 offset has been lost.