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Problem-Entering ISP mode after POWER-ON of board-Plz help group.

Started by Saurabh Arora September 29, 2007
Hi Group,

I have built a code using LPC2136 & it runs successfully giving desired outputs.I have a problem reg. the entering of LPC in ISP mode when I switch on my board.I have made a circuitry for ISP giving 22k pull up on pin p0.41.When once I program my chip(giving logic 0 on pin p0.41 after reset-through u-link jumper-connected to 1K pull down resistor),the chip is programmed properly.Now I remove the u-link giving logic 1 to p0.14 through 22k pull up resistor to 3.3V.
But now I power on my board,the lpc enters into ISP mode(perhaps the logic 1 appeared on p0.41) after some delay w.r.t 3.3V supply to LPC's Vcc & Vdd pins.
This is ensured by the fact that now when I reset my board(being in power on condition already),my application code runs.
So guys plz suggest me to what to do to provide delay to lpc Vcc & Vdd pins so relatively the 3.3 V appears on the pin p0.41 earlier?

Thanks & Regards
Saurabh Arora

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--- In l..., Saurabh Arora wrote:
>
> Hi Group,
>
> I have built a code using LPC2136 & it runs successfully giving
desired outputs.I have a problem reg. the entering of LPC in ISP mode
when I switch on my board.I have made a circuitry for ISP giving 22k
pull up on pin p0.41.When once I program my chip(giving logic 0 on pin
p0.41 after reset-through u-link jumper-connected to 1K pull down
resistor),the chip is programmed properly.Now I remove the u-link
giving logic 1 to p0.14 through 22k pull up resistor to 3.3V.
> But now I power on my board,the lpc enters into ISP mode(perhaps
the logic 1 appeared on p0.41) after some delay w.r.t 3.3V supply to
LPC's Vcc & Vdd pins.
> This is ensured by the fact that now when I reset my board(being
in power on condition already),my application code runs.
> So guys plz suggest me to what to do to provide delay to lpc Vcc &
Vdd pins so relatively the 3.3 V appears on the pin p0.41 earlier?
>
> Thanks & Regards
> Saurabh Arora

Electrons move pretty fast, there is no reason you need to change the
timing of the LPC versus the pull-up resistor. P0.14 is sampled when
the device comes out of reset, not when power is applied.

However, you do need a clean reset signal at startup. I notice that
Olimex uses an MCP130T to provide the reset signal for their LPC-P2138
board http://www.olimex.com/dev/pdf/lpc-p2138.pdf The delay is
typically 350 mS and that is a LONG time to hold reset low while the
system stabilizes.

Richard
Thanx group...specially Richard bcoz I finally solved my problem.

Cheers Group!!!

rtstofer wrote: --- In l..., Saurabh Arora wrote:
>
> Hi Group,
>
> I have built a code using LPC2136 & it runs successfully giving
desired outputs.I have a problem reg. the entering of LPC in ISP mode
when I switch on my board.I have made a circuitry for ISP giving 22k
pull up on pin p0.41.When once I program my chip(giving logic 0 on pin
p0.41 after reset-through u-link jumper-connected to 1K pull down
resistor),the chip is programmed properly.Now I remove the u-link
giving logic 1 to p0.14 through 22k pull up resistor to 3.3V.
> But now I power on my board,the lpc enters into ISP mode(perhaps
the logic 1 appeared on p0.41) after some delay w.r.t 3.3V supply to
LPC's Vcc & Vdd pins.
> This is ensured by the fact that now when I reset my board(being
in power on condition already),my application code runs.
> So guys plz suggest me to what to do to provide delay to lpc Vcc &
Vdd pins so relatively the 3.3 V appears on the pin p0.41 earlier?
>
> Thanks & Regards
> Saurabh Arora

Electrons move pretty fast, there is no reason you need to change the
timing of the LPC versus the pull-up resistor. P0.14 is sampled when
the device comes out of reset, not when power is applied.

However, you do need a clean reset signal at startup. I notice that
Olimex uses an MCP130T to provide the reset signal for their LPC-P2138
board http://www.olimex.com/dev/pdf/lpc-p2138.pdf The delay is
typically 350 mS and that is a LONG time to hold reset low while the
system stabilizes.

Richard

---------------------------------
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At 10:05 AM 9/29/2007 -0700, Saurabh Arora wrote:
>Thanx group...specially Richard bcoz I finally solved my problem.

Don't keep us in suspense. What was the solution?

Robert

Another sign of the end of civilization, our technical magazines are
getting chatty
From an EETimes product descriptions 2006/08/09
".... systems that can sample gobs of inputs simultaneously"
Now just what is the technical definition for gobs again?
http://www.aeolusdevelopment.com/

Memfault Beyond the Launch