Hi all,

I'm currently writing a software where I will use all four UARTs of
the LPC2468.

I base my software upon the FreeRTOS real time system.

My plan is to write an ISR that handles requests from all 4 UARTs. to
avoid having to jump in and out of the ISR my plan is to do like this:
* Set up the VIC to run the same ISR on all UART interrupts.
* When any of the UARTs request an interrupt the ISR will get launched
and take care of the UART that generated the interrupt.
* After leaving the ISR it will check weather or not there is anything
to take care of at the other UARTs.

My question is then, if some of the other UARTs requests an interrupt
while the ISR is running (or more that one UARTs requests an interrupt
at the same time), will the pending request automatically be cleared
when taking care of it in the ISR when it runs the first time? For
example:

1. UART2 requests an interrupt since the TX FIFO is empty.
2. The ISR is luanched and starting to fill upp the FIFO for UART2.
3. UART0 requests an interrupts because one byte have been received.
4. The ISR check the status of all of the UARTs and discovers that
UART0 have a received byte and takes care of it.
5. The ISR exits.

At this point would the pending interrupt from UART0 have get cleared
so that the ISR isn't launched once again?
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