We are trying to evaluate if the LPC 2378 could fit our application
and I would need your expertise on this:
We would like to capture an external 4MHz signal clock. To do this we
would configure the timer as counter. We would need to latch the
counter value on an event from the capture input (frequency about 10
times lower than external clock) and this should generate an interrupt.
My understanding from the data sheet shows that it is possible if we
configure this way:
CAP0.0 can be the source for the external clock and CAP0.1 can be the
capture input;
CTCR[1:0] : 01 to increment the counter on rising edge of CAP0.0
CTCR[3:2] : 00 to declare CAP0.0 to be the clock
TCCR[2:0] : 000 because CAP0.0 is not the capture input
TCCR[5:3] : 111 to capture the counter value on both edges of CAP0.1.
We will generate an interrupt every time CR1 is loaded with TC.

My questions are:
1) Is this correct? Otherwise what do you suggest?
2) How can we discriminate between a rising edge or falling edge from
CAP0.1 since both trigger the same interrupt? Is it possible to poll
CAP0.1?
3) What would be the minimum PCLK to achieve our goal? At least 4
times the frequency of our external clock as the data sheet mentions?
4) What is the duration of a fast and short interrupt written in C,
just to save the value from CR1 in SRAM for example if we run at 40MHz ?

Best regards

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