I am designing a system using the LPC2470. I want store the code in
flash, and copy it to SRAM at powerup & execute the code from there.
The flash and SRAM parts are both 16-bit wide devices. I'm not sure
if this design will work, so I'm looking for guidance.
The LPC24xx Users' Manual(sec 10.21) says that the EMC Static Memory
Config Registers default to assuming that external memory is 8-bits
wide at POR. I can't change the EMC settings until my bootcode
executes. Since that will reside in the external 16-bit-wide flash,
I seem to be facing a Catch-22 here.
- Can I reprogram the bootloader stored in the on-chip ROM so that I
can configure the EMC before accessing off-chip memory?
- If I can, is it wise to do so?
- Has anyone designed a system using the LPC2460/70? If so, what
does your memory architecture look like?
(sigh - so many questions, so little time!)
Thanks,
Chris
Memory system design using LPC2470
Started by ●January 23, 2009
Reply by ●January 26, 20092009-01-26
If you download and install the keil's evaluation mdk, you can find a
complete startup assembler code that let you to configure y the EMC at power
up. It is located at ...\Keil\ARM\Startup\Philips.
By the way, if you want to configure the SRAM you have to configure the
DYNAMIC interface, not the static.
To copy the code to the sram at startup (if you are using the keil's mdk):
1) first you have to declare the memory space (sram) where you want
to put the code at Flash->Configure flash tools->Target
2) The linker creates automatically a scatter file which defines the
place where it have to read the code and where to execute it. This file has
the .sct extension and has the same name as your executable. Copy this file
with another name: "my_scatter.sct" e.g.
3) If you open this file you will see that execution address is the
same as load address. What you have to do is to change execution address to
the memory space declared before and put there the line ".ANY (+RO)".
4) The last step, and the easiest. You have to say to the linker that
you want to use your file so you go to Flash->Configure flash tools->Linker,
and in misc controls you have to put the line: "--scatter my_scatter.sct"
(without the quotes)
Hope works for you.
2009/1/23 Chris Lawton
> I am designing a system using the LPC2470. I want store the code in
> flash, and copy it to SRAM at powerup & execute the code from there.
> The flash and SRAM parts are both 16-bit wide devices. I'm not sure
> if this design will work, so I'm looking for guidance.
>
> The LPC24xx Users' Manual(sec 10.21) says that the EMC Static Memory
> Config Registers default to assuming that external memory is 8-bits
> wide at POR. I can't change the EMC settings until my bootcode
> executes. Since that will reside in the external 16-bit-wide flash,
> I seem to be facing a Catch-22 here.
>
> - Can I reprogram the bootloader stored in the on-chip ROM so that I
> can configure the EMC before accessing off-chip memory?
> - If I can, is it wise to do so?
> - Has anyone designed a system using the LPC2460/70? If so, what
> does your memory architecture look like?
>
> (sigh - so many questions, so little time!)
>
> Thanks,
>
> Chris
>
>
>
complete startup assembler code that let you to configure y the EMC at power
up. It is located at ...\Keil\ARM\Startup\Philips.
By the way, if you want to configure the SRAM you have to configure the
DYNAMIC interface, not the static.
To copy the code to the sram at startup (if you are using the keil's mdk):
1) first you have to declare the memory space (sram) where you want
to put the code at Flash->Configure flash tools->Target
2) The linker creates automatically a scatter file which defines the
place where it have to read the code and where to execute it. This file has
the .sct extension and has the same name as your executable. Copy this file
with another name: "my_scatter.sct" e.g.
3) If you open this file you will see that execution address is the
same as load address. What you have to do is to change execution address to
the memory space declared before and put there the line ".ANY (+RO)".
4) The last step, and the easiest. You have to say to the linker that
you want to use your file so you go to Flash->Configure flash tools->Linker,
and in misc controls you have to put the line: "--scatter my_scatter.sct"
(without the quotes)
Hope works for you.
2009/1/23 Chris Lawton
> I am designing a system using the LPC2470. I want store the code in
> flash, and copy it to SRAM at powerup & execute the code from there.
> The flash and SRAM parts are both 16-bit wide devices. I'm not sure
> if this design will work, so I'm looking for guidance.
>
> The LPC24xx Users' Manual(sec 10.21) says that the EMC Static Memory
> Config Registers default to assuming that external memory is 8-bits
> wide at POR. I can't change the EMC settings until my bootcode
> executes. Since that will reside in the external 16-bit-wide flash,
> I seem to be facing a Catch-22 here.
>
> - Can I reprogram the bootloader stored in the on-chip ROM so that I
> can configure the EMC before accessing off-chip memory?
> - If I can, is it wise to do so?
> - Has anyone designed a system using the LPC2460/70? If so, what
> does your memory architecture look like?
>
> (sigh - so many questions, so little time!)
>
> Thanks,
>
> Chris
>
>
>
Reply by ●November 18, 20092009-11-18
--- In l..., Daniel Cobo wrote:
> By the way, if you want to configure the SRAM you have to configure the
> DYNAMIC interface, not the static.
I will soon be configuring a custom lpc2478 board with ext SRAM but no ext SDRAM. I don't see anything in the latest rev4 UM or errata to suggest that any dynamic registers would need to be programmed. Most of those settings would not apply to SRAM anyway, so can someone clarify this statement? I have been working with the EA board, but I planned to disable the dynamic setup. What dynamic settings would I still need?
For the EMC, the UM has unclear wording and no timing diagrams. One picture would tell it all. No way to really know how to optimize WaitWen,WaitOen,WaitRd,WaitWr,WaitTurn without time consuming trial and error with a scope. Any app notes for this?
> By the way, if you want to configure the SRAM you have to configure the
> DYNAMIC interface, not the static.
I will soon be configuring a custom lpc2478 board with ext SRAM but no ext SDRAM. I don't see anything in the latest rev4 UM or errata to suggest that any dynamic registers would need to be programmed. Most of those settings would not apply to SRAM anyway, so can someone clarify this statement? I have been working with the EA board, but I planned to disable the dynamic setup. What dynamic settings would I still need?
For the EMC, the UM has unclear wording and no timing diagrams. One picture would tell it all. No way to really know how to optimize WaitWen,WaitOen,WaitRd,WaitWr,WaitTurn without time consuming trial and error with a scope. Any app notes for this?
Reply by ●November 18, 20092009-11-18
--- In l..., "tclarke1" wrote:
>
> --- In l..., Daniel Cobo wrote:
> > By the way, if you want to configure the SRAM you have to configure the
> > DYNAMIC interface, not the static.
>
> I will soon be configuring a custom lpc2478 board with ext SRAM but no ext SDRAM. I don't see anything in the latest rev4 UM or errata to suggest that any dynamic registers would need to be programmed. Most of those settings would not apply to SRAM anyway, so can someone clarify this statement? I have been working with the EA board, but I planned to disable the dynamic setup. What dynamic settings would I still need?
>
> For the EMC, the UM has unclear wording and no timing diagrams. One picture would tell it all. No way to really know how to optimize WaitWen,WaitOen,WaitRd,WaitWr,WaitTurn without time consuming trial and error with a scope. Any app notes for this?
>
You're right -- SRAM does not need DYNAMIC settings...
That said, there is a timing diagram in the part DATASHEET. Pretty thin explanation but it should be enough to get you going. Be careful about WE/OE/BL as their timings are weird. If you are not aware, WE must be enabled through another bit in the config registers which then alters BL timing. :)
>
> --- In l..., Daniel Cobo wrote:
> > By the way, if you want to configure the SRAM you have to configure the
> > DYNAMIC interface, not the static.
>
> I will soon be configuring a custom lpc2478 board with ext SRAM but no ext SDRAM. I don't see anything in the latest rev4 UM or errata to suggest that any dynamic registers would need to be programmed. Most of those settings would not apply to SRAM anyway, so can someone clarify this statement? I have been working with the EA board, but I planned to disable the dynamic setup. What dynamic settings would I still need?
>
> For the EMC, the UM has unclear wording and no timing diagrams. One picture would tell it all. No way to really know how to optimize WaitWen,WaitOen,WaitRd,WaitWr,WaitTurn without time consuming trial and error with a scope. Any app notes for this?
>
You're right -- SRAM does not need DYNAMIC settings...
That said, there is a timing diagram in the part DATASHEET. Pretty thin explanation but it should be enough to get you going. Be careful about WE/OE/BL as their timings are weird. If you are not aware, WE must be enabled through another bit in the config registers which then alters BL timing. :)
