Hi,

I have followed the Yagarto install procedure but I get the following
error while starting the debugger in flash mode: "Error finishing
flash operation". The debugger starts and I am able to step through
the example code (provided by Yagarto), however the target reset when
I it the addition line (for those who are not familiar with the
example, the code features a forever loop with an addition).

I use a custom made LPC2129-based board, which I can perfectly program
using the flashmagic. I use the modified files from the LPC21248
example available on the yagarto site. I did modify the jtagkey.cfg
because I am using an ARM-USB-OCD jtag interface from Olimex and the
flash size of the lpc2129 is only #256k. Here is the cfg.

"
#
# For more information about the configuration files, take a
# look at the "Open On-Chip Debugger (openocd)" documentation.
#
# This config file was tested with OpenOCD version r717
#

# daemon configuration
telnet_port 4444
gdb_port 3333

# tell gdb our flash memory map
# and enable flash programming
gdb_memory_map enable
gdb_flash_program enable

#
# interface, if you want to use an other interface
# you must replace this section here
#
#################### interface start ####################

interface ft2232
ft2232_device_desc "Olimex OpenOCD JTAG A"
ft2232_layout "olimex-jtag"
ft2232_vid_pid 0x15BA 0x0003

##################### interface end #####################

# start slow, speed up after reset
jtag_khz 20 1500

#delays on reset lines
jtag_nsrst_delay 200
jtag_ntrst_delay 200

#use combined on interfaces or targets that can't set TRST/SRST
separately
reset_config trst_and_srst srst_pulls_trst

#LPCs need reset pulled while RTCK is low. 0 to activate JTAG, power-
on reset is not enough
jtag_reset 1 1
jtag_reset 0 0

#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe

#target configuration
daemon_startup reset

#target
#target arm7tdmi
target arm7tdmi little run_and_init 0 arm7tdmi-s_r4
run_and_halt_time 0 30

target_script 0 reset ./prj/lpc2148_reset_oocd.script

working_area 0 0x40000000 0x4000 nobackup

#flash bank lpc2000 0 0
flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v2 14765
"
Here is the console output on eclipse:

"
target remote localhost:3333
0x0000028c in ?? ()
monitor reset
JTAG device found: 0x4f1f0f0f (Manufacturer: 0x787, Part: 0xf1f0,
Version: 0x4)
executing reset script './prj/lpc2148_reset_oocd.script'
monitor sleep 500
monitor poll
target state: halted
target halted in ARM state due to debug request, current mode:
Supervisor
cpsr: 0x600000d3 pc: 0x0000028c
monitor soft_reset_halt
requesting target halt and executing a soft reset
monitor arm7_9 force_hw_bkpts enable
force hardware breakpoints enabled
monitor mww 0xE01FC040 0x0001
monitor mdw 0xE01FC040
0xe01fc040: 00000001
set mem inaccessible-by-default off
load
Loading section .text, size 0x16c lma 0x0
Error finishing flash operation
break main
Breakpoint 1 at 0x10c: file src/main.c, line 71.
continue
Note: automatically using hardware breakpoints for read-only addresses.

Breakpoint 1, main () at src/main.c:71
71 DWORD a = 1;
"

Here is the output of the openocd window:

"
C:\Documents and Settings\Administrator\workspace\lpc2148Test>openocd-
ftd2xx -f prj\jtagkey.cfg
Open On-Chip Debugger (2008-06-19 19:00) svn: 717 URL: http://svn.berlios.de/svnroot/repos/openocd/trunk
Info: options.c:50 configuration_output_handler(): jtag_khz: 10, 10
Info: options.c:50 configuration_output_handler(): Open On-Chip
Debugger (2008-06-19 19:00) svn: 717
Info: jtag.c:1389 jtag_examine_chain(): JTAG device found:
0x4f1f0f0f (Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info: jtag.c:1389 jtag_examine_chain(): JTAG device found:
0x4f1f0f0f (Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info: target.c:237 target_init_handler(): executing reset script './
prj/lpc2148_reset_oocd.script'
Info: server.c:78 add_connection(): accepting 'gdb' connection from 0
Warning: gdb_server.c:416 gdb_get_packet_inner(): acknowledgment
received, but no packet pending
Info: jtag.c:1389 jtag_examine_chain(): JTAG device found:
0x4f1f0f0f (Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info: target.c:237 target_init_handler(): executing reset script './
prj/lpc2148_reset_oocd.script'
User: target.c:957 target_arch_state(): target state: halted
User: armv4_5.c:307 armv4_5_arch_state(): target halted in ARM
state due to debug request, current mode: Supervisor
cpsr: 0x600000d3 pc: 0x0000028c
User: target.c:1838 handle_soft_reset_halt_command(): requesting
target halt and executing a soft reset
User: gdb_server.c:574 gdb_output(): force hardware breakpoints
enabled
User: gdb_server.c:574 gdb_output(): 0xe01fc040: 00000001
Warning: lpc2000.c:611 lpc2000_write(): lpc2000 returned 6
Error: flash.c:103 flash_driver_write(): error writing to flash at
address 0x00000000 at offset 0x00000000 (-902)
Warning: arm7_9_common.c:1950 arm7_9_read_memory(): memory read caused
data abort (address: 0xffffffff, size: 0x1, count: 0x1)
"

Here are the openocd initialization commands:
"
target remote localhost:3333
monitor reset
monitor sleep 500
monitor poll
monitor soft_reset_halt
monitor arm7_9 force_hw_bkpts enable
monitor mww 0xE01FC040 0x0001
monitor mdw 0xE01FC040

# needed for gdb 6.8 and higher
set mem inaccessible-by-default off

load
break main
continue
"

Finally, here is the memory map for the lpc2129 (taken from lpc2148
and modified):
"
/
****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
the
* documentation and/or other materials provided with the
distribution.
* 3. Neither the name of the author nor the names of its contributors
may
* be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
****************************************************************************
*
* History:
*
* 26.01.08 mifi First Version
****************************************************************************/
ENTRY(ResetHandler)
SEARCH_DIR(.)

/*
* Define stack size here
*/
FIQ_STACK_SIZE = 0x0100;
IRQ_STACK_SIZE = 0x0100;
ABT_STACK_SIZE = 0x0100;
UND_STACK_SIZE = 0x0100;
SVC_STACK_SIZE = 0x0400;

/*
* This file, olimex_lpcp2148_ram.ld, locate the program in the
internal
* ram of the LPC2148. For more information about the memory of the
LPC2148
* take a look in the LPC2141/2142/2144/2146/2148 USER MANUAL.
* Reference is made to the user manual from 25 July 2006 Rev. 02
*
* Take a look at page 8, section 1.Memory maps
*/

MEMORY
{
rom : org = 0x00000000, len = 256k
ram : org = 0x40000000, len = 16k
}

/*
* Do not change the next code
*/
SECTIONS
{
.text :
{
*(.vectors);
. = ALIGN(4);
*(.init);
. = ALIGN(4);
*(.text);
. = ALIGN(4);
*(.rodata);
. = ALIGN(4);
*(.rodata*);
. = ALIGN(4);
*(.glue_7t);
. = ALIGN(4);
*(.glue_7);
. = ALIGN(4);
etext = .;
} > rom

.data :
{
PROVIDE (__data_start = .);
*(.data)
. = ALIGN(4);
edata = .;
_edata = .;
PROVIDE (__data_end = .);
} > ram

.bss :
{
PROVIDE (__bss_start = .);
*(.bss)
*(COMMON)
. = ALIGN(4);
PROVIDE (__bss_end = .);

. = ALIGN(256);

PROVIDE (__stack_start = .);

PROVIDE (__stack_fiq_start = .);
. += FIQ_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_fiq_end = .);

PROVIDE (__stack_irq_start = .);
. += IRQ_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_irq_end = .);

PROVIDE (__stack_abt_start = .);
. += ABT_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_abt_end = .);

PROVIDE (__stack_und_start = .);
. += UND_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_und_end = .);

PROVIDE (__stack_svc_start = .);
. += SVC_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_svc_end = .);
PROVIDE (__stack_end = .);
PROVIDE (__heap_start = .);
} > ram

}
/*** EOF ***/
"
Any idea on how to fix this issue?

Thanks,
Jean-Sebastien

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