Hi all,
I need to implement Timeout for incomplete receive packet.
In UART ISR , read the RX character and store it in Buffer.If the receive
character is tail character(unsigned char)means ,give that buffer to application.If i not receive tail character for some time, which means incomplete packet
i need to give this imcomplete packet also to application.For this purpose i uses CTI interrupt.FIFO trigger level is set to 8 bytes.Which means If i get CTI interrupt means, read all bytes in while loop(lsrvalue & 0x01)
and put it in buffer and then give it to application.(Current implementation).

Issue :
1) If Receive packet is 8 bytes means,ISR get RDA interrupt.
In that single RDA interrupt,i read all 8 bytes use while
loop(LsrValue & 01).So i not gettting CTI interrupt.Those 8 bytes
doesn't have tail character.So this is incomplete packet.But ISR wont
give this type of pckets(packet length is multiple of 8 and doesn't
contain tail character)to application.

Question :

If UART RX FIFO fully contains data,after read all byes,now FIFO is empty.Can i get CTI interrupt??If not How can i handle my situation???

Please share ur knoledge??

Thanks,

Start a New Thread

The usual technique is to enable RDA, and CTI interrupts.
If either one of these triggers, read in all bytes from the
FIFO. The CTI interrupt is really there so that you get the
bytes in a timely manner if the FIFO does not reach the trigger
threshold.

Don't rely on the packet being a multiple of 8bytes as a method
to tell if you have reached the end. What happens if there
is some noise, that inserts or delete a byte in your packet?
Or, if there is a slowdown on the sending end, you might get
a CTI interrupt in the middle of a packet. You need to handle
the packet decode in a different manner.

Personally, I usually build a generic interrupt handler that
copies received data into a ring buffer. The task that takes
data out of the ring buffer, does the packet decode and
validation. You could also do your packet decode and validation
in the ISR, and then only pass off complete packets to the
application.

Good luck,

Mike
> -----Original Message-----
> From: l...
> [mailto:l...]On Behalf
> Of p...@yahoo.co.in
> Sent: Tuesday, October 06, 2009 10:36 PM
> To: l...
> Subject: [lpc2000] Reg: Use of CTI Interrupt in UART's ISR
> implementation
> Hi all,
> I need to implement Timeout for incomplete receive packet.
> In UART ISR , read the RX character and store it in Buffer.If
> the receive
> character is tail character(unsigned char)means ,give that
> buffer to application.If i not receive tail character for
> some time, which means incomplete packet
> i need to give this imcomplete packet also to application.For
> this purpose i uses CTI interrupt.FIFO trigger level is set
> to 8 bytes.Which means If i get CTI interrupt means, read all
> bytes in while loop(lsrvalue & 0x01)
> and put it in buffer and then give it to application.(Current
> implementation).
>
> Issue :
> 1) If Receive packet is 8 bytes means,ISR get RDA interrupt.
> In that single RDA interrupt,i read all 8 bytes use while
> loop(LsrValue & 01).So i not gettting CTI interrupt.Those 8 bytes
> doesn't have tail character.So this is incomplete
> packet.But ISR wont
> give this type of pckets(packet length is multiple of 8
> and doesn't
> contain tail character)to application.
>
> Question :
>
> If UART RX FIFO fully contains data,after read all
> byes,now FIFO is empty.Can i get CTI interrupt??If not How
> can i handle my situation???
>
> Please share ur knoledge??
>
> Thanks,

Start a New Thread

We use a separate timer that is reset each time a character arrives.

We know (from the packet) how many characters are expected so we look for
that many and hand them out.

If a new character arrives and the timer has expired then the current buffer
is discarded as not all the characters have arrived.

This method might not work for you but maybe you can use the base ideas.

.Laurie:{)

From: l... [mailto:l...] On Behalf Of
p...@yahoo.co.in
Sent: Wednesday, 7 October 2009 3:36 PM
To: l...
Subject: [lpc2000] Reg: Use of CTI Interrupt in UART's ISR implementation

Hi all,
I need to implement Timeout for incomplete receive packet.
In UART ISR , read the RX character and store it in Buffer.If the receive
character is tail character(unsigned char)means ,give that buffer to
application.If i not receive tail character for some time, which means
incomplete packet
i need to give this imcomplete packet also to application.For this purpose i
uses CTI interrupt.FIFO trigger level is set to 8 bytes.Which means If i get
CTI interrupt means, read all bytes in while loop(lsrvalue & 0x01)
and put it in buffer and then give it to application.(Current
implementation).

Issue :
1) If Receive packet is 8 bytes means,ISR get RDA interrupt.
In that single RDA interrupt,i read all 8 bytes use while
loop(LsrValue & 01).So i not gettting CTI interrupt.Those 8 bytes
doesn't have tail character.So this is incomplete packet.But ISR wont
give this type of pckets(packet length is multiple of 8 and doesn't
contain tail character)to application.

Question :

If UART RX FIFO fully contains data,after read all byes,now FIFO is
empty.Can i get CTI interrupt??If not How can i handle my situation???

Please share ur knoledge??

Thanks,



Start a New Thread

Thanks all for ur info.I am planning to use timer for this purpose with CTI

--- On Wed, 7/10/09, Laurie Gellatly wrote:

From: Laurie Gellatly
Subject: RE: [lpc2000] Reg: Use of CTI Interrupt in UART's ISR implementation
To: l...
Date: Wednesday, 7 October, 2009, 12:40 PM




We use a separate timer that is reset each time a character arrives.

We know (from the packet) how many characters are expected so we look for

that many and hand them out.

If a new character arrives and the timer has expired then the current buffer

is discarded as not all the characters have arrived.

This method might not work for you but maybe you can use the base ideas.

.Laurie:{)

From: lpc2000@yahoogroups .com [mailto:lpc2000@yahoogroups .com] On Behalf Of

prabuisin@yahoo. co.in

Sent: Wednesday, 7 October 2009 3:36 PM

To: lpc2000@yahoogroups .com

Subject: [lpc2000] Reg: Use of CTI Interrupt in UART's ISR implementation

Hi all,

I need to implement Timeout for incomplete receive packet.

In UART ISR , read the RX character and store it in Buffer.If the receive

character is tail character(unsigned char)means ,give that buffer to

application. If i not receive tail character for some time, which means

incomplete packet

i need to give this imcomplete packet also to application. For this purpose i

uses CTI interrupt.FIFO trigger level is set to 8 bytes.Which means If i get

CTI interrupt means, read all bytes in while loop(lsrvalue & 0x01)

and put it in buffer and then give it to application. (Current

implementation) .

Issue :

1) If Receive packet is 8 bytes means,ISR get RDA interrupt.

In that single RDA interrupt,i read all 8 bytes use while

loop(LsrValue & 01).So i not gettting CTI interrupt.Those 8 bytes

doesn't have tail character.So this is incomplete packet.But ISR wont

give this type of pckets(packet length is multiple of 8 and doesn't

contain tail character)to application.

Question :

If UART RX FIFO fully contains data,after read all byes,now FIFO is

empty.Can i get CTI interrupt??If not How can i handle my situation???

Please share ur knoledge??

Thanks,

















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