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OS_CPU_SR_Save

Started by "shariff.javeed" December 21, 2009
Hi,

I'm trying to port uCOSIIv276 on LPC2129 uC.

I've got the source code for uCOSIIv2.76 from
http://read.pudn.com/downloads75/sourcecode/embed/278358/uCOSKeil276/Port/os_cpu_a.s__.htm

Here is the explanation:

1. During uCOSII initialization, Idle task is being created using OSTaskCreateExt.
2. While creating this task, OS_ENTER_CRITICAL(); ALL the interrupts are disabled and then we uCOS proceeds with other checks for idle task creation.

I've encountered problem in OS_ENTER_CRITICAL(); where it loops for ever and is unable to disable the interrupts. The following is the section of the code:

NO_INT EQU 0xC0

OS_CPU_SR_Save
; Set IRQ and FIQ bits in CPSR to disable all interrupts
MRS R0, CPSR
ORR R1, R0,#NO_INT
MSR CPSR_c, R1
; Confirm that CPSR contains the proper interrupt disable flags
MRS R1, CPSR
AND R1, R1,#NO_INT
CMP R1, #NO_INT
BNE OS_CPU_SR_Save ; Not properly disabled (try again)
BX LR; Disabled, return the original CPSR contents in R0
Has anybody tried similar thing in the past? Please help.

Regards,
Javeed

An Engineer's Guide to the LPC2100 Series