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OpenOCD halt fails with LPC2468

Started by dave_albert February 18, 2010
I'm trying to setup OpenOCD 0.3.1 for debugging using an Olimex ARM-USB-TINY JTAG debugger and an Olimex LPC-E2468 development board.

I start OpenOCD (version 0.3.1) with the following command:
C:\Program Files\OpenOCD\0.3.1>openocd -f interface\olimex-jtag-tiny.cfg -f target\lpc2468.cfg

It appears to start successfully and displays:
Open On-Chip Debugger 0.3.1 (2009-11-13-16:13)
$URL$
For bug reports, read
http://openocd.berlios.de/doc/doxygen/bugs.html
jtag_nsrst_delay: 100
jtag_ntrst_delay: 100
trst_and_srst srst_pulls_trst srst_gates_jtag trst_push_pull srst_open_drain
RCLK - adaptive
Info : RCLK (adaptive clock speed) not supported - fallback to 500 kHz
Info : JTAG tap: lpc2468.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787, part: 0xf
1f0, ver: 0x4)
Info : Embedded ICE version 7
Error: EmbeddedICE v7 handling might be broken

The behavior is the same if I use a Signalyzer instead of the Olimex JTAG debugger.

The problem is that I can't halt the processor. When I telnet to OpenOCD and issue the halt command it fails:

Open On-Chip Debugger
- init
- reset
JTAG tap: lpc2468.cpu tap/device found: 0x4f1f0f0f (mfg: 0x787, part: 0xf1f0, ver: 0x4)
> halt
Halt timed out, wake up GDB.
timed out while waiting for target halted
Runtime error, file "command.c", line 473:

- soft_reset_halt
requesting target halt and executing a soft reset
Failed to halt CPU after 1 sec
Halt timed out, wake up GDB.
-

I have the same problem when trying to halt an LPC2106.

Others have commented on this, but I haven't seen a solution posted. Can anyone help?

An Engineer's Guide to the LPC2100 Series

It seems my problem was that my startup code wasn't configuring the PLL properly. With the PLL and various dividers configured correctly, I am able to halt OpenOCD and debug as expected.