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Lpc2103 could not enter UART0 IRQ

Started by hjiongh April 28, 2010
Hi,
I'm using LPC2103, IAR4.42A. Now I use IAR setup file lpc2xxx_cstartup.s79 and setup a new project.
In main funciton , I setup PLL and UART0 as below:
================================void SysControl_Init(void)
{
#ifdef xFLASH
MEMMAP=3;
#elif xSDRAM
MEMMAP = 2; // xSDRAM should be defined in PRO_Sys_Macro.h , modify in the future
#elif iRAM
MEMMAP = 2;
#else
MEMMAP=1;
#endif

APBDIV = 1; // APB bus clock is the same as the processor clock

SysControl_Enable_PLL();

//SCS = 1;

MAMCR = 2; // Per NXP advisory 7/11/05 for correct operation from // flash in stand alone mode
MAMTIM = 4;

SysControl_VIC_Init();

}

void SysControl_Enable_PLL(void)
{
INT8U MValue, PValue;

//PLLCON = 0; // Disable PLL, disconnected
//PLLFEED = 0xAA;
//PLLFEED = 0x55;

PLLCFG = PLL_MValue | (PLL_PValue << 5);
PLLCON = 1; // Disable PLL, disconnected
PLLFEED = 0xAA;
PLLFEED = 0x55;

while ( ((PLLSTAT & (1 << 10)) == 0) ); // Check lock bit status

MValue = PLLSTAT & 0x0000001F;
PValue = (PLLSTAT & 0x00000060) >> 5;
while ((MValue != PLL_MValue) && ( PValue != PLL_PValue) );

PLLCON = 0x03; // Enable PLL, disconnected
PLLFEED = 0xAA;
PLLFEED = 0x55;

//while ( ((PLLSTAT & (1 << 10)) == 0) ); // Check connect bit status
}

void SysControl_VIC_Init(void)
{
INT32U i;
INT32U *ptr2VectCtrlBase = (unsigned int *)0xFFFFF200;
INT32U *ptr2VectAddrBase = (unsigned int *)0xFFFFF100;

for(i=0; i<16; i++)
{
*ptr2VectCtrlBase++ = 0; // Disable all vectored IRQ slots
*ptr2VectAddrBase++ = 0; // Clear address of the Interrupt Service routine (ISR) for vectored IRQs
}

VICIntSelect = 0; // Set all VIC interrupts to IRQ for now
VICIntEnClr = 0xFFFFFFFF; // Diasable all interrupts
//VICProtection = 0; // VIC registers can be accessed in User or privileged mode
VICVectAddr = 0; // Clear interrupt
}
PINSEL0 &= 0xfffffff0;
PINSEL0 |= 0x00000005;

U0LCR = 0x83;
Fdiv = (Fpclk/16)/UART_BPS;
U0DLM = Fdiv/256;
U0DLL = Fdiv %256;
U0LCR = 0x03;

U0FCR = 0x01; //the interrupt will occurs when received one byte data.
U0IER = 0x01;

VICVectCntl0=0x26;
VICVectAddr0 = (INT32U)&UART0_ISR;
VICIntEnable |= 0x00000040;
================================
I only could send string via UART0 successfully , but could not enter UART0 ISR while receive data via UART0.

It doubted me that since send string via UART0 is ok, why receive failed. I only use UART as RS232. Also when receive data via UART while debugging, I paused debug and saw U0RBR has data which i send through PC. It's very strange.

Hope anyone can help me or supply me LPC2103 demo project base on IAR4.42A.(IAR4.42A setting demo project has no UART :( ,so i hope can supply me project with UART part)

Thanks very much! Hope your response!
Best Regards,
Vincent

An Engineer's Guide to the LPC2100 Series

Hello, do you receive one interrupt on send char to PC?

If you can't receive on interrupt, maybe CPSR register of MCU running on
this mode don't enable IRQ interrupt.

于 2010-4-28 17:47, hjiongh 写道:
> Hi,
> I'm using LPC2103, IAR4.42A. Now I use IAR setup file
> lpc2xxx_cstartup.s79 and setup a new project.
> In main funciton , I setup PLL and UART0 as below:
> ================================> void SysControl_Init(void)
> {
> #ifdef xFLASH
> MEMMAP=3;
> #elif xSDRAM
> MEMMAP = 2; // xSDRAM should be defined in PRO_Sys_Macro.h , modify in
> the future
> #elif iRAM
> MEMMAP = 2;
> #else
> MEMMAP=1;
> #endif
>
> APBDIV = 1; // APB bus clock is the same as the processor clock
>
> SysControl_Enable_PLL();
> //SCS = 1;
>
> MAMCR = 2; // Per NXP advisory 7/11/05 for correct operation from //
> flash in stand alone mode
> MAMTIM = 4;
>
> SysControl_VIC_Init();
>
> }
>
> void SysControl_Enable_PLL(void)
> {
> INT8U MValue, PValue;
>
> //PLLCON = 0; // Disable PLL, disconnected
> //PLLFEED = 0xAA;
> //PLLFEED = 0x55;
> PLLCFG = PLL_MValue | (PLL_PValue << 5);
> PLLCON = 1; // Disable PLL, disconnected
> PLLFEED = 0xAA;
> PLLFEED = 0x55;
>
> while ( ((PLLSTAT & (1 << 10)) == 0) ); // Check lock bit status
>
> MValue = PLLSTAT & 0x0000001F;
> PValue = (PLLSTAT & 0x00000060) >> 5;
> while ((MValue != PLL_MValue) && ( PValue != PLL_PValue) );
>
> PLLCON = 0x03; // Enable PLL, disconnected
> PLLFEED = 0xAA;
> PLLFEED = 0x55;
>
> //while ( ((PLLSTAT & (1 << 10)) == 0) ); // Check connect bit status
> }
>
> void SysControl_VIC_Init(void)
> {
> INT32U i;
> INT32U *ptr2VectCtrlBase = (unsigned int *)0xFFFFF200;
> INT32U *ptr2VectAddrBase = (unsigned int *)0xFFFFF100;
>
> for(i=0; i<16; i++)
> {
> *ptr2VectCtrlBase++ = 0; // Disable all vectored IRQ slots
> *ptr2VectAddrBase++ = 0; // Clear address of the Interrupt Service
> routine (ISR) for vectored IRQs
> }
>
> VICIntSelect = 0; // Set all VIC interrupts to IRQ for now
> VICIntEnClr = 0xFFFFFFFF; // Diasable all interrupts
> //VICProtection = 0; // VIC registers can be accessed in User or
> privileged mode
> VICVectAddr = 0; // Clear interrupt
> }
>
> PINSEL0 &= 0xfffffff0;
> PINSEL0 |= 0x00000005;
>
> U0LCR = 0x83;
> Fdiv = (Fpclk/16)/UART_BPS;
> U0DLM = Fdiv/256;
> U0DLL = Fdiv %256;
> U0LCR = 0x03;
>
> U0FCR = 0x01; //the interrupt will occurs when received one byte data.
> U0IER = 0x01;
>
> VICVectCntl0=0x26;
> VICVectAddr0 = (INT32U)&UART0_ISR;
> VICIntEnable |= 0x00000040;
> ================================>
> I only could send string via UART0 successfully , but could not enter
> UART0 ISR while receive data via UART0.
>
> It doubted me that since send string via UART0 is ok, why receive
> failed. I only use UART as RS232. Also when receive data via UART while
> debugging, I paused debug and saw U0RBR has data which i send through
> PC. It's very strange.
>
> Hope anyone can help me or supply me LPC2103 demo project base on
> IAR4.42A.(IAR4.42A setting demo project has no UART :( ,so i hope can
> supply me project with UART part)
>
> Thanks very much! Hope your response!
>
> Best Regards,
> Vincent
Hello sir,

Thank you . I found that CPSR bit[7](I bit) = 1 after entered main . So
all IRQ disabled.
In startup.s79 file , it will setup CPSR.
But file I used is copy from IAR. Since I have no experience in compile
language.
Please help me how to set CPSR value in startup.s.

--------------
From: "yytek"
Sent: Wednesday, April 28, 2010 10:26 PM
To:
Cc: "hjiongh"
Subject: Re: [lpc2000] Lpc2103 could not enter UART0 IRQ

> Hello, do you receive one interrupt on send char to PC?
>
> If you can't receive on interrupt, maybe CPSR register of MCU running on
> this mode don't enable IRQ interrupt.
>
> 于 2010-4-28 17:47, hjiongh 写道:
>> Hi,
>> I'm using LPC2103, IAR4.42A. Now I use IAR setup file
>> lpc2xxx_cstartup.s79 and setup a new project.
>> In main funciton , I setup PLL and UART0 as below:
>> ================================>> void SysControl_Init(void)
>> {
>> #ifdef xFLASH
>> MEMMAP=3;
>> #elif xSDRAM
>> MEMMAP = 2; // xSDRAM should be defined in PRO_Sys_Macro.h , modify in
>> the future
>> #elif iRAM
>> MEMMAP = 2;
>> #else
>> MEMMAP=1;
>> #endif
>>
>> APBDIV = 1; // APB bus clock is the same as the processor clock
>>
>> SysControl_Enable_PLL();
>> //SCS = 1;
>>
>> MAMCR = 2; // Per NXP advisory 7/11/05 for correct operation from //
>> flash in stand alone mode
>> MAMTIM = 4;
>>
>> SysControl_VIC_Init();
>>
>> }
>>
>> void SysControl_Enable_PLL(void)
>> {
>> INT8U MValue, PValue;
>>
>> //PLLCON = 0; // Disable PLL, disconnected
>> //PLLFEED = 0xAA;
>> //PLLFEED = 0x55;
>> PLLCFG = PLL_MValue | (PLL_PValue << 5);
>> PLLCON = 1; // Disable PLL, disconnected
>> PLLFEED = 0xAA;
>> PLLFEED = 0x55;
>>
>> while ( ((PLLSTAT & (1 << 10)) == 0) ); // Check lock bit status
>>
>> MValue = PLLSTAT & 0x0000001F;
>> PValue = (PLLSTAT & 0x00000060) >> 5;
>> while ((MValue != PLL_MValue) && ( PValue != PLL_PValue) );
>>
>> PLLCON = 0x03; // Enable PLL, disconnected
>> PLLFEED = 0xAA;
>> PLLFEED = 0x55;
>>
>> //while ( ((PLLSTAT & (1 << 10)) == 0) ); // Check connect bit status
>> }
>>
>> void SysControl_VIC_Init(void)
>> {
>> INT32U i;
>> INT32U *ptr2VectCtrlBase = (unsigned int *)0xFFFFF200;
>> INT32U *ptr2VectAddrBase = (unsigned int *)0xFFFFF100;
>>
>> for(i=0; i<16; i++)
>> {
>> *ptr2VectCtrlBase++ = 0; // Disable all vectored IRQ slots
>> *ptr2VectAddrBase++ = 0; // Clear address of the Interrupt Service
>> routine (ISR) for vectored IRQs
>> }
>>
>> VICIntSelect = 0; // Set all VIC interrupts to IRQ for now
>> VICIntEnClr = 0xFFFFFFFF; // Diasable all interrupts
>> //VICProtection = 0; // VIC registers can be accessed in User or
>> privileged mode
>> VICVectAddr = 0; // Clear interrupt
>> }
>>
>> PINSEL0 &= 0xfffffff0;
>> PINSEL0 |= 0x00000005;
>>
>> U0LCR = 0x83;
>> Fdiv = (Fpclk/16)/UART_BPS;
>> U0DLM = Fdiv/256;
>> U0DLL = Fdiv %256;
>> U0LCR = 0x03;
>>
>> U0FCR = 0x01; //the interrupt will occurs when received one byte data.
>> U0IER = 0x01;
>>
>> VICVectCntl0=0x26;
>> VICVectAddr0 = (INT32U)&UART0_ISR;
>> VICIntEnable |= 0x00000040;
>> ================================>>
>> I only could send string via UART0 successfully , but could not enter
>> UART0 ISR while receive data via UART0.
>>
>> It doubted me that since send string via UART0 is ok, why receive
>> failed. I only use UART as RS232. Also when receive data via UART while
>> debugging, I paused debug and saw U0RBR has data which i send through
>> PC. It's very strange.
>>
>> Hope anyone can help me or supply me LPC2103 demo project base on
>> IAR4.42A.(IAR4.42A setting demo project has no UART :( ,so i hope can
>> supply me project with UART part)
>>
>> Thanks very much! Hope your response!
>>
>> Best Regards,
>> Vincent
>>
>

--- In l..., "Vincent" wrote:
> But file I used is copy from IAR. Since I have no experience in compile
> language.
> Please help me how to set CPSR value in startup.s.
>

Technical support for IAR software is available from:

http://www.iar.com/website1/1.0.1.0/447/1/

--
Chris Burrows
CFB Software
Astrobe: LPC2000 Oberon-07 Development System
http://www.astrobe.com

after:
orr r0,r0,#SYS_MODE ; Set System mode bits

append:
bic r0,r0,#0x80 ; Enable IRQ interrupt

In 2010-4-29 10:55, Vincent Wrote:
> Hello sir,
>
> Thank you . I found that CPSR bit[7](I bit) = 1 after entered main . So
> all IRQ disabled.
> In startup.s79 file , it will setup CPSR.
> But file I used is copy from IAR. Since I have no experience in compile
> language.
> Please help me how to set CPSR value in startup.s.
>
> --------------
> From: "yytek" >
> Sent: Wednesday, April 28, 2010 10:26 PM
> To: >
> Cc: "hjiongh" >
> Subject: Re: [lpc2000] Lpc2103 could not enter UART0 IRQ
>
> > Hello, do you receive one interrupt on send char to PC?
> >
> > If you can't receive on interrupt, maybe CPSR register of MCU running on
> > this mode don't enable IRQ interrupt.
> >
> > 于 2010-4-28 17:47, hjiongh 写道:
> >>
> >>
> >> Hi,
> >> I'm using LPC2103, IAR4.42A. Now I use IAR setup file
> >> lpc2xxx_cstartup.s79 and setup a new project.
> >> In main funciton , I setup PLL and UART0 as below:
> >> ================================> >> void SysControl_Init(void)
> >> {
> >> #ifdef xFLASH
> >> MEMMAP=3;
> >> #elif xSDRAM
> >> MEMMAP = 2; // xSDRAM should be defined in PRO_Sys_Macro.h , modify in
> >> the future
> >> #elif iRAM
> >> MEMMAP = 2;
> >> #else
> >> MEMMAP=1;
> >> #endif
> >>
> >> APBDIV = 1; // APB bus clock is the same as the processor clock
> >>
> >> SysControl_Enable_PLL();
> >>
> >>
> >> //SCS = 1;
> >>
> >> MAMCR = 2; // Per NXP advisory 7/11/05 for correct operation from //
> >> flash in stand alone mode
> >> MAMTIM = 4;
> >>
> >> SysControl_VIC_Init();
> >>
> >> }
> >>
> >> void SysControl_Enable_PLL(void)
> >> {
> >> INT8U MValue, PValue;
> >>
> >> //PLLCON = 0; // Disable PLL, disconnected
> >> //PLLFEED = 0xAA;
> >> //PLLFEED = 0x55;
> >>
> >>
> >> PLLCFG = PLL_MValue | (PLL_PValue << 5);
> >> PLLCON = 1; // Disable PLL, disconnected
> >> PLLFEED = 0xAA;
> >> PLLFEED = 0x55;
> >>
> >> while ( ((PLLSTAT & (1 << 10)) == 0) ); // Check lock bit status
> >>
> >> MValue = PLLSTAT & 0x0000001F;
> >> PValue = (PLLSTAT & 0x00000060) >> 5;
> >> while ((MValue != PLL_MValue) && ( PValue != PLL_PValue) );
> >>
> >> PLLCON = 0x03; // Enable PLL, disconnected
> >> PLLFEED = 0xAA;
> >> PLLFEED = 0x55;
> >>
> >> //while ( ((PLLSTAT & (1 << 10)) == 0) ); // Check connect bit status
> >> }
> >>
> >> void SysControl_VIC_Init(void)
> >> {
> >> INT32U i;
> >> INT32U *ptr2VectCtrlBase = (unsigned int *)0xFFFFF200;
> >> INT32U *ptr2VectAddrBase = (unsigned int *)0xFFFFF100;
> >>
> >> for(i=0; i<16; i++)
> >> {
> >> *ptr2VectCtrlBase++ = 0; // Disable all vectored IRQ slots
> >> *ptr2VectAddrBase++ = 0; // Clear address of the Interrupt Service
> >> routine (ISR) for vectored IRQs
> >> }
> >>
> >> VICIntSelect = 0; // Set all VIC interrupts to IRQ for now
> >> VICIntEnClr = 0xFFFFFFFF; // Diasable all interrupts
> >> //VICProtection = 0; // VIC registers can be accessed in User or
> >> privileged mode
> >> VICVectAddr = 0; // Clear interrupt
> >> }
> >>
> >> PINSEL0 &= 0xfffffff0;
> >> PINSEL0 |= 0x00000005;
> >>
> >> U0LCR = 0x83;
> >> Fdiv = (Fpclk/16)/UART_BPS;
> >> U0DLM = Fdiv/256;
> >> U0DLL = Fdiv %256;
> >> U0LCR = 0x03;
> >>
> >> U0FCR = 0x01; //the interrupt will occurs when received one byte data.
> >> U0IER = 0x01;
> >>
> >> VICVectCntl0=0x26;
> >> VICVectAddr0 = (INT32U)&UART0_ISR;
> >> VICIntEnable |= 0x00000040;
> >> ================================> >>
> >> I only could send string via UART0 successfully , but could not enter
> >> UART0 ISR while receive data via UART0.
> >>
> >> It doubted me that since send string via UART0 is ok, why receive
> >> failed. I only use UART as RS232. Also when receive data via UART while
> >> debugging, I paused debug and saw U0RBR has data which i send through
> >> PC. It's very strange.
> >>
> >> Hope anyone can help me or supply me LPC2103 demo project base on
> >> IAR4.42A.(IAR4.42A setting demo project has no UART :( ,so i hope can
> >> supply me project with UART part)
> >>
> >> Thanks very much! Hope your response!
> >>
> >> Best Regards,
> >> Vincent
> >>
> >>
> >
Hi sir,

I append this sentence, and when enter main, CPSR I bit =0.
When I send data to UART via PC, it still not enter UART_ISR ,always
enter __program_start and never jump to main.

It's very strange. I have no idea.
BTW, below is my PLL config code:
============================#define PLL_MValue 3 // actually M=4
#define PLL_PValue 1 // actually P=2

PLLCFG = PLL_MValue | (PLL_PValue << 5);
PLLCON = 1; // Disable PLL, disconnected
PLLFEED = 0xAA;
PLLFEED = 0x55;

while ( ((PLLSTAT & (1 << 10)) == 0) ); // Check lock bit status

MValue = PLLSTAT & 0x0000001F;
PValue = (PLLSTAT & 0x00000060) >> 5;
while ((MValue != PLL_MValue) && ( PValue != PLL_PValue) );

PLLCON = 0x03; // Enable PLL, disconnected
PLLFEED = 0xAA;
PLLFEED = 0x55;
============================
I found PLL CONNECT bit not always = 1, in debug mode, when debug paused,
this bit sometime =0 , sometime =1.
If my PLL configuration has some issue?

Thanks a lot.

Best Regards,
Vincent

--------------
From: "kaoru"
Sent: Thursday, April 29, 2010 12:10 PM
To:
Cc: "Vincent"
Subject: Re: [lpc2000] Lpc2103 could not enter UART0 IRQ

> after:
> orr r0,r0,#SYS_MODE ; Set System mode bits
>
> append:
> bic r0,r0,#0x80 ; Enable IRQ interrupt
>
> In 2010-4-29 10:55, Vincent Wrote:
>> Hello sir,
>>
>> Thank you . I found that CPSR bit[7](I bit) = 1 after entered main . So
>> all IRQ disabled.
>> In startup.s79 file , it will setup CPSR.
>> But file I used is copy from IAR. Since I have no experience in compile
>> language.
>> Please help me how to set CPSR value in startup.s.
>>
>> --------------
>> From: "yytek" >
>> Sent: Wednesday, April 28, 2010 10:26 PM
>> To: >
>> Cc: "hjiongh" >
>> Subject: Re: [lpc2000] Lpc2103 could not enter UART0 IRQ
>>
>> > Hello, do you receive one interrupt on send char to PC?
>> >
>> > If you can't receive on interrupt, maybe CPSR register of MCU running
>> on
>> > this mode don't enable IRQ interrupt.
>> >
>> > 于 2010-4-28 17:47, hjiongh 写道:
>> >>
>> >>
>> >> Hi,
>> >> I'm using LPC2103, IAR4.42A. Now I use IAR setup file
>> >> lpc2xxx_cstartup.s79 and setup a new project.
>> >> In main funciton , I setup PLL and UART0 as below:
>> >> ================================>> >> void SysControl_Init(void)
>> >> {
>> >> #ifdef xFLASH
>> >> MEMMAP=3;
>> >> #elif xSDRAM
>> >> MEMMAP = 2; // xSDRAM should be defined in PRO_Sys_Macro.h , modify
>> in
>> >> the future
>> >> #elif iRAM
>> >> MEMMAP = 2;
>> >> #else
>> >> MEMMAP=1;
>> >> #endif
>> >>
>> >> APBDIV = 1; // APB bus clock is the same as the processor clock
>> >>
>> >> SysControl_Enable_PLL();
>> >>
>> >>
>> >> //SCS = 1;
>> >>
>> >> MAMCR = 2; // Per NXP advisory 7/11/05 for correct operation from //
>> >> flash in stand alone mode
>> >> MAMTIM = 4;
>> >>
>> >> SysControl_VIC_Init();
>> >>
>> >> }
>> >>
>> >> void SysControl_Enable_PLL(void)
>> >> {
>> >> INT8U MValue, PValue;
>> >>
>> >> //PLLCON = 0; // Disable PLL, disconnected
>> >> //PLLFEED = 0xAA;
>> >> //PLLFEED = 0x55;
>> >>
>> >>
>> >> PLLCFG = PLL_MValue | (PLL_PValue << 5);
>> >> PLLCON = 1; // Disable PLL, disconnected
>> >> PLLFEED = 0xAA;
>> >> PLLFEED = 0x55;
>> >>
>> >> while ( ((PLLSTAT & (1 << 10)) == 0) ); // Check lock bit status
>> >>
>> >> MValue = PLLSTAT & 0x0000001F;
>> >> PValue = (PLLSTAT & 0x00000060) >> 5;
>> >> while ((MValue != PLL_MValue) && ( PValue != PLL_PValue) );
>> >>
>> >> PLLCON = 0x03; // Enable PLL, disconnected
>> >> PLLFEED = 0xAA;
>> >> PLLFEED = 0x55;
>> >>
>> >> //while ( ((PLLSTAT & (1 << 10)) == 0) ); // Check connect bit status
>> >> }
>> >>
>> >> void SysControl_VIC_Init(void)
>> >> {
>> >> INT32U i;
>> >> INT32U *ptr2VectCtrlBase = (unsigned int *)0xFFFFF200;
>> >> INT32U *ptr2VectAddrBase = (unsigned int *)0xFFFFF100;
>> >>
>> >> for(i=0; i<16; i++)
>> >> {
>> >> *ptr2VectCtrlBase++ = 0; // Disable all vectored IRQ slots
>> >> *ptr2VectAddrBase++ = 0; // Clear address of the Interrupt Service
>> >> routine (ISR) for vectored IRQs
>> >> }
>> >>
>> >> VICIntSelect = 0; // Set all VIC interrupts to IRQ for now
>> >> VICIntEnClr = 0xFFFFFFFF; // Diasable all interrupts
>> >> //VICProtection = 0; // VIC registers can be accessed in User or
>> >> privileged mode
>> >> VICVectAddr = 0; // Clear interrupt
>> >> }
>> >>
>> >> PINSEL0 &= 0xfffffff0;
>> >> PINSEL0 |= 0x00000005;
>> >>
>> >> U0LCR = 0x83;
>> >> Fdiv = (Fpclk/16)/UART_BPS;
>> >> U0DLM = Fdiv/256;
>> >> U0DLL = Fdiv %256;
>> >> U0LCR = 0x03;
>> >>
>> >> U0FCR = 0x01; //the interrupt will occurs when received one byte
>> data.
>> >> U0IER = 0x01;
>> >>
>> >> VICVectCntl0=0x26;
>> >> VICVectAddr0 = (INT32U)&UART0_ISR;
>> >> VICIntEnable |= 0x00000040;
>> >> ================================>> >>
>> >> I only could send string via UART0 successfully , but could not enter
>> >> UART0 ISR while receive data via UART0.
>> >>
>> >> It doubted me that since send string via UART0 is ok, why receive
>> >> failed. I only use UART as RS232. Also when receive data via UART
>> while
>> >> debugging, I paused debug and saw U0RBR has data which i send through
>> >> PC. It's very strange.
>> >>
>> >> Hope anyone can help me or supply me LPC2103 demo project base on
>> >> IAR4.42A.(IAR4.42A setting demo project has no UART :( ,so i hope can
>> >> supply me project with UART part)
>> >>
>> >> Thanks very much! Hope your response!
>> >>
>> >> Best Regards,
>> >> Vincent
>> >>
>> >>
>> >
>>
>

/**
* armboot - Startup Code for ARM7 CPU-core
*/

/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
.equ MODE_USR, 0x10
.equ MODE_FIQ, 0x11
.equ MODE_IRQ, 0x12
.equ MODE_SVC, 0x13
.equ MODE_ABT, 0x17
.equ MODE_UND, 0x1B
.equ MODE_SYS, 0x1F

.equ I_BIT, 0x80 /* when I bit is set, IRQ is disabled */
.equ F_BIT, 0x40 /* when F bit is set, FIQ is disabled */

/* Stack Configuration */
.equ TOP_STACK, 0x40004000
.equ UND_STACK_SIZE, 0x00000004
.equ SVC_STACK_SIZE, 0x00000004
.equ ABT_STACK_SIZE, 0x00000004
.equ FIQ_STACK_SIZE, 0x00000004
.equ IRQ_STACK_SIZE, 0x00000080

.text

.global __start
.global __reset
.global __initstack

__start:
/*
* Vector table
*/
b __reset /* Reset interrupt */
b . /* Undefined Instruction */
b . /* Software Interrupt */
b . /* Prefetch Abort Interrupt */
b . /* Data Abort Interrupt */
b . /* Reserved */
ldr pc, [PC, #-0xFF0] /* IRQ Interrupt */
b . /* FRQ Interrupt */

/* The copyright notice embedded at the begining of the ROM */
.string "Copyright (c) YYTEK. All Rights Reserved."
.align 4 /* re-align to the word boundary */

__reset:
bl __initstack /* Initial stack */

load_data: /* load .data section to ram */
ldr r1, = __text_end
ldr r2, = __data_start
ldr r3, = __data_end
load_data1:
cmp r2, r3;
ldrlo r0, [r1], #4
strlo r0, [r2], #4
blo load_data1

clear_bss:
ldr r0, =__bss_start /* find start of bss segment */
ldr r1, =__bss_end /* stop here */
mov r2, #0x00000000 /* clear */

clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
ble clbss_l

bl lowlevel_init
b main

/*
* Stack Configuration.
*
* Enabling interrupts in the CPSR and keeping the part in
* Supervison mode after ARM core reset.
*/
__initstack:
mov r0, lr

ldr r1, =TOP_STACK
msr cpsr_c, #MODE_UND | I_BIT | F_BIT
mov sp, r1

sub r1, r1, #UND_STACK_SIZE
msr cpsr_c, #MODE_ABT | I_BIT | F_BIT
mov sp, r1

sub r1, r1, #ABT_STACK_SIZE
msr cpsr_c, #MODE_FIQ | I_BIT | F_BIT
mov sp, r1

sub r1, r1, #FIQ_STACK_SIZE
msr cpsr_c, #MODE_IRQ | I_BIT | F_BIT
mov sp, r1

sub r1, r1, #IRQ_STACK_SIZE
msr cpsr_c, #MODE_SVC | I_BIT | F_BIT
mov sp, r1

sub r1, r1, #SVC_STACK_SIZE
msr cpsr_c, #MODE_SYS | F_BIT
mov sp, r1

mov pc, r0