I have just started with LPC2214.
I would like to know if there is something called Global interrupt Disable and
enable.
as we have EA in 8051 if not How would i do this.
I would like to Disable all the existing interupts when i enter into Critical
section and go back when and finish with it.
Can somebody help on this.
LPC Enable and Disable of interrupts
Started by ●July 29, 2010
Reply by ●July 29, 20102010-07-29
--- In l..., "prashanthi74" wrote:
> I have just started with LPC2214.
> I would like to know if there is something called Global interrupt Disable and enable.
> as we have EA in 8051 if not How would i do this.
> I would like to Disable all the existing interupts when i enter into Critical section and go back when and finish with it.
>
> Can somebody help on this.
>
http://www.keil.com/support/docs/2910.htm
Richard
> I have just started with LPC2214.
> I would like to know if there is something called Global interrupt Disable and enable.
> as we have EA in 8051 if not How would i do this.
> I would like to Disable all the existing interupts when i enter into Critical section and go back when and finish with it.
>
> Can somebody help on this.
>
http://www.keil.com/support/docs/2910.htm
Richard
Reply by ●July 29, 20102010-07-29
There is no such instruction, you have to change a bit in a cpsr
register. You have to be in a privileged state to do so.
And you have to make sure that the change took place, in case another
task is enabling interrupts at the 'same' time.
Here's the functions that I use:
disable_interrupts:
dint:
critical_Begin:
mrs r0, cpsr
orr r1, r0, #IRQ_DISABLED /* keep r0 to return */
msr cpsr_c, r1
mrs r2, cpsr
and r2, r2, #IRQ_DISABLED
cmp r2, #IRQ_DISABLED
bne =critical_Begin
bx lr
enable_interrupts:
eint:
critical_End:
stmfd sp!, {r0}
mrs r0, cpsr
bic r0,r0,#IRQ_DISABLED
msr cpsr_fsxc, r0
ldmfd sp!, {r0}
bx lr
DaveS
----------
On Thu, Jul 29, 2010 at 2:23 AM, prashanthi74 wrote:
>
> I have just started with LPC2214.
> I would like to know if there is something called Global interrupt Disable and enable.
> as we have EA in 8051 if not How would i do this.
> I would like to Disable all the existing interupts when i enter into Critical section and go back when and finish with it.
>
> Can somebody help on this.
>
register. You have to be in a privileged state to do so.
And you have to make sure that the change took place, in case another
task is enabling interrupts at the 'same' time.
Here's the functions that I use:
disable_interrupts:
dint:
critical_Begin:
mrs r0, cpsr
orr r1, r0, #IRQ_DISABLED /* keep r0 to return */
msr cpsr_c, r1
mrs r2, cpsr
and r2, r2, #IRQ_DISABLED
cmp r2, #IRQ_DISABLED
bne =critical_Begin
bx lr
enable_interrupts:
eint:
critical_End:
stmfd sp!, {r0}
mrs r0, cpsr
bic r0,r0,#IRQ_DISABLED
msr cpsr_fsxc, r0
ldmfd sp!, {r0}
bx lr
DaveS
----------
On Thu, Jul 29, 2010 at 2:23 AM, prashanthi74 wrote:
>
> I have just started with LPC2214.
> I would like to know if there is something called Global interrupt Disable and enable.
> as we have EA in 8051 if not How would i do this.
> I would like to Disable all the existing interupts when i enter into Critical section and go back when and finish with it.
>
> Can somebody help on this.
>
Reply by ●July 29, 20102010-07-29
--- In l..., David Smead wrote:
> And you have to make sure that the change took place, in case another
> task is enabling interrupts at the 'same' time.
In my experience, it would be a very unusual task switching model that would require the looping test shown in the interrupt disable function.
In general, the only way that another "task" could interfere with the interrupt disable instruction sequence would be via an interrupt (perhaps FIQ) or exception that occurred after the "msr cpsr_c,r1" instruction and then did not properly restore the interrupted task's interrupt disabled state when returning.
> And you have to make sure that the change took place, in case another
> task is enabling interrupts at the 'same' time.
In my experience, it would be a very unusual task switching model that would require the looping test shown in the interrupt disable function.
In general, the only way that another "task" could interfere with the interrupt disable instruction sequence would be via an interrupt (perhaps FIQ) or exception that occurred after the "msr cpsr_c,r1" instruction and then did not properly restore the interrupted task's interrupt disabled state when returning.
