i have the following queries related to
> LPC2378 processor:
> 1. normally if nothing is mentioned about power control, so the lpc2378
> runs on the internal rc oscillator at 4Mhz right?? so if nothing is
> mentioned about the PLL registers in our program then can we assume a
> frequency of 4mhz being applied to cpu since the cpu divider will also be
1
> if pll is bypassed, am i right??
>
> 2. Second doubt is that the SSP supports SPI format...so if want to use
> the SSP as SPI format then do we have to also power
the SPI peripheral for
> it?? if yes then y do v have to power the SPI peripheral for SSP to run as
> SPI??...aren't SSP and SPI 2 individual peripherals??SSP is just using
SPI
> format...then y enable SPI peripheral for it??
>
> 3. If anyone can explain to me function of timer...the manual says that
> prescale counter register is the value by which the
peripheral clock for
> timer is divided by...so if i dont use pll then my internal rc oscillator
> of 4Mhz is used to generate the CPU clock...so if i set Prescale Counter
as
> 4000000 (i.e. 4 x 10^6) and Prescale register as 1
then every 1 second
> Prescale counter will be increamented to 1 and timer counter will be
> also incremented as Prescale counter will be equal to the Prescale
> register..so now prescale register will again be reset to 0....so this is
> wat i inferred from the manual...am i right coz this logic isnt working in
> my program??
> Thanks so much...
--
Dev Sampat****
Cell (Oman): (+968) - 9304 8932****
Email: d...@gmail.com
LPC2378 Doubts - Clock, SSP/SPI, Timer)
Started by ●January 28, 2012
Reply by ●January 28, 20122012-01-28
--- In l..., DeV wrote:
>
> i have the following queries related to
> > LPC2378 processor:
> >
> >
> > 1. normally if nothing is mentioned about power control, so the lpc2378
> > runs on the internal rc oscillator at 4Mhz right?? so if nothing is
> > mentioned about the PLL registers in our program then can we assume a
> > frequency of 4mhz being applied to cpu since the cpu divider will also be
> 1
> > if pll is bypassed, am i right??
No, read section 6.2 of the User Manual
> >
> > 2. Second doubt is that the SSP supports SPI format...so if want to use
>
> > the SSP as SPI format then do we have to also power the SPI peripheral for
> > it?? if yes then y do v have to power the SPI peripheral for SSP to run as
> > SPI??...aren't SSP and SPI 2 individual peripherals??SSP is just using SPI
> > format...then y enable SPI peripheral for it??
> >
The devices are separate and you should not need to power the SPI gadget just to use the SSP.
But this is a case where you can answer your own question by simply experimenting.
> > 3. If anyone can explain to me function of timer...the manual says that
>
> > prescale counter register is the value by which the peripheral clock for
> > timer is divided by...so if i dont use pll then my internal rc oscillator
> > of 4Mhz is used to generate the CPU clock...so if i set Prescale Counter
> as
> > 4000000 (i.e. 4 x 10^6) and Prescale register as 1 then every 1 second
> > Prescale counter will be increamented to 1 and timer counter will be
> > also incremented as Prescale counter will be equal to the Prescale
> > register..so now prescale register will again be reset to 0....so this is
> > wat i inferred from the manual...am i right coz this logic isnt working in
> > my program??
No, read section 7.4 and table 5.1 of the User Manual
Richard
>
> i have the following queries related to
> > LPC2378 processor:
> >
> >
> > 1. normally if nothing is mentioned about power control, so the lpc2378
> > runs on the internal rc oscillator at 4Mhz right?? so if nothing is
> > mentioned about the PLL registers in our program then can we assume a
> > frequency of 4mhz being applied to cpu since the cpu divider will also be
> 1
> > if pll is bypassed, am i right??
No, read section 6.2 of the User Manual
> >
> > 2. Second doubt is that the SSP supports SPI format...so if want to use
>
> > the SSP as SPI format then do we have to also power the SPI peripheral for
> > it?? if yes then y do v have to power the SPI peripheral for SSP to run as
> > SPI??...aren't SSP and SPI 2 individual peripherals??SSP is just using SPI
> > format...then y enable SPI peripheral for it??
> >
The devices are separate and you should not need to power the SPI gadget just to use the SSP.
But this is a case where you can answer your own question by simply experimenting.
> > 3. If anyone can explain to me function of timer...the manual says that
>
> > prescale counter register is the value by which the peripheral clock for
> > timer is divided by...so if i dont use pll then my internal rc oscillator
> > of 4Mhz is used to generate the CPU clock...so if i set Prescale Counter
> as
> > 4000000 (i.e. 4 x 10^6) and Prescale register as 1 then every 1 second
> > Prescale counter will be increamented to 1 and timer counter will be
> > also incremented as Prescale counter will be equal to the Prescale
> > register..so now prescale register will again be reset to 0....so this is
> > wat i inferred from the manual...am i right coz this logic isnt working in
> > my program??
No, read section 7.4 and table 5.1 of the User Manual
Richard
Reply by ●January 28, 20122012-01-28
--- In l..., "rtstofer" wrote:
> No, read section 7.4 and table 5.1 of the User Manual
>
> Richard
>
Make that table 51 - typo...
Richard
> No, read section 7.4 and table 5.1 of the User Manual
>
> Richard
>
Make that table 51 - typo...
Richard
Reply by ●January 29, 20122012-01-29
thanks so much Richard...i referred to the keil debug session and
understood that pll is generating 288Mhz which is inturn divided for CPU as
48Mhz and peripheral clock as 12Mhz...however my doubt for counter still
remains d same...wat im getin confused is the Prescale counter
Register...is the prescale counter register used to further divide the pclk
frequency for the timer?? or is prescale counter is an individual operating
register that keeps on increamenting at every pclk edge and increments
timer counter wen it matches prescale register...i.e. prescale counter can
only be read and not written!
On Sat, Jan 28, 2012 at 8:29 PM, rtstofer wrote:
> **
> --- In l..., "rtstofer" wrote:
> > No, read section 7.4 and table 5.1 of the User Manual
> >
> > Richard
> > Make that table 51 - typo...
>
> Richard
>
>
>
--
Dev Sampat****
Cell (Oman): (+968) - 9304 8932****
Email: d...@gmail.com
understood that pll is generating 288Mhz which is inturn divided for CPU as
48Mhz and peripheral clock as 12Mhz...however my doubt for counter still
remains d same...wat im getin confused is the Prescale counter
Register...is the prescale counter register used to further divide the pclk
frequency for the timer?? or is prescale counter is an individual operating
register that keeps on increamenting at every pclk edge and increments
timer counter wen it matches prescale register...i.e. prescale counter can
only be read and not written!
On Sat, Jan 28, 2012 at 8:29 PM, rtstofer wrote:
> **
> --- In l..., "rtstofer" wrote:
> > No, read section 7.4 and table 5.1 of the User Manual
> >
> > Richard
> > Make that table 51 - typo...
>
> Richard
>
>
>
--
Dev Sampat****
Cell (Oman): (+968) - 9304 8932****
Email: d...@gmail.com
Reply by ●January 29, 20122012-01-29
A prescaler is just a divider ahead to the actual clock.
DaveS
On Sat, Jan 28, 2012 at 11:50 PM, DeV wrote:
> thanks so much Richard...i referred to the keil debug session and
> understood that pll is generating 288Mhz which is inturn divided for CPU as
> 48Mhz and peripheral clock as 12Mhz...however my doubt for counter still
> remains d same...wat im getin confused is the Prescale counter
> Register...is the prescale counter register used to further divide the pclk
> frequency for the timer?? or is prescale counter is an individual operating
> register that keeps on increamenting at every pclk edge and increments
> timer counter wen it matches prescale register...i.e. prescale counter can
> only be read and not written!
>
> On Sat, Jan 28, 2012 at 8:29 PM, rtstofer wrote:
>
>> **
>> --- In l..., "rtstofer" wrote:
>> > No, read section 7.4 and table 5.1 of the User Manual
>> >
>> > Richard
>> >
>>
>> Make that table 51 - typo...
>>
>> Richard
>> --
>
> Dev Sampat****
>
> Cell (Oman): (+968) - 9304 8932****
>
> Email: d...@gmail.com
>
>
>
DaveS
On Sat, Jan 28, 2012 at 11:50 PM, DeV wrote:
> thanks so much Richard...i referred to the keil debug session and
> understood that pll is generating 288Mhz which is inturn divided for CPU as
> 48Mhz and peripheral clock as 12Mhz...however my doubt for counter still
> remains d same...wat im getin confused is the Prescale counter
> Register...is the prescale counter register used to further divide the pclk
> frequency for the timer?? or is prescale counter is an individual operating
> register that keeps on increamenting at every pclk edge and increments
> timer counter wen it matches prescale register...i.e. prescale counter can
> only be read and not written!
>
> On Sat, Jan 28, 2012 at 8:29 PM, rtstofer wrote:
>
>> **
>> --- In l..., "rtstofer" wrote:
>> > No, read section 7.4 and table 5.1 of the User Manual
>> >
>> > Richard
>> >
>>
>> Make that table 51 - typo...
>>
>> Richard
>> --
>
> Dev Sampat****
>
> Cell (Oman): (+968) - 9304 8932****
>
> Email: d...@gmail.com
>
>
>
Reply by ●January 29, 20122012-01-29
Thanks DaveS..but does that mean that if my pclk is 12Mhz and i set the
prescaler as 12Mhz so my clock reference for the timer shud b 1hz...i.e. 1
cycle (i.e. 1 rising edge) per sec...
On Sun, Jan 29, 2012 at 12:45 PM, David Smead wrote:
> **
> A prescaler is just a divider ahead to the actual clock.
>
> DaveS
> On Sat, Jan 28, 2012 at 11:50 PM, DeV wrote:
> > thanks so much Richard...i referred to the keil debug session and
> > understood that pll is generating 288Mhz which is inturn divided for CPU
> as
> > 48Mhz and peripheral clock as 12Mhz...however my doubt for counter still
> > remains d same...wat im getin confused is the Prescale counter
> > Register...is the prescale counter register used to further divide the
> pclk
> > frequency for the timer?? or is prescale counter is an individual
> operating
> > register that keeps on increamenting at every pclk edge and increments
> > timer counter wen it matches prescale register...i.e. prescale counter
> can
> > only be read and not written!
> >
> > On Sat, Jan 28, 2012 at 8:29 PM, rtstofer wrote:
> >
> >> **
>
> >>
> >>
> >>
> >>
> >> --- In l..., "rtstofer" wrote:
> >> > No, read section 7.4 and table 5.1 of the User Manual
> >> >
> >> > Richard
> >> >
> >>
> >> Make that table 51 - typo...
> >>
> >> Richard
> >>
> >>
> >>
> >
> >
> >
> > --
> >
> > Dev Sampat****
> >
> > Cell (Oman): (+968) - 9304 8932****
> >
> > Email: d...@gmail.com
> >
> >
> >
> >
> >
> >
> >
> >
> >
prescaler as 12Mhz so my clock reference for the timer shud b 1hz...i.e. 1
cycle (i.e. 1 rising edge) per sec...
On Sun, Jan 29, 2012 at 12:45 PM, David Smead wrote:
> **
> A prescaler is just a divider ahead to the actual clock.
>
> DaveS
> On Sat, Jan 28, 2012 at 11:50 PM, DeV wrote:
> > thanks so much Richard...i referred to the keil debug session and
> > understood that pll is generating 288Mhz which is inturn divided for CPU
> as
> > 48Mhz and peripheral clock as 12Mhz...however my doubt for counter still
> > remains d same...wat im getin confused is the Prescale counter
> > Register...is the prescale counter register used to further divide the
> pclk
> > frequency for the timer?? or is prescale counter is an individual
> operating
> > register that keeps on increamenting at every pclk edge and increments
> > timer counter wen it matches prescale register...i.e. prescale counter
> can
> > only be read and not written!
> >
> > On Sat, Jan 28, 2012 at 8:29 PM, rtstofer wrote:
> >
> >> **
>
> >>
> >>
> >>
> >>
> >> --- In l..., "rtstofer" wrote:
> >> > No, read section 7.4 and table 5.1 of the User Manual
> >> >
> >> > Richard
> >> >
> >>
> >> Make that table 51 - typo...
> >>
> >> Richard
> >>
> >>
> >>
> >
> >
> >
> > --
> >
> > Dev Sampat****
> >
> > Cell (Oman): (+968) - 9304 8932****
> >
> > Email: d...@gmail.com
> >
> >
> >
> >
> >
> >
> >
> >
> >
Reply by ●January 29, 20122012-01-29
You set the prescaler as a division. Usually those are in powers of
2. For example. by 2, 4, 8, 16, etc. I you want 1 Hz from a 12 MHz
clock you'd have to set the prescaler to 12,000,000, which is not a
binary number and probably not possible. To get 1 Hz, you need to
select a prescale division and then set the timer to the necessary
reload count.
DaveS
On Sun, Jan 29, 2012 at 12:50 AM, DeV wrote:
> Thanks DaveS..but does that mean that if my pclk is 12Mhz and i set the
> prescaler as 12Mhz so my clock reference for the timer shud b 1hz...i.e. 1
> cycle (i.e. 1 rising edge) per sec...
>
> On Sun, Jan 29, 2012 at 12:45 PM, David Smead wrote:
>
>> **
>> A prescaler is just a divider ahead to the actual clock.
>>
>> DaveS
>> On Sat, Jan 28, 2012 at 11:50 PM, DeV wrote:
>> > thanks so much Richard...i referred to the keil debug session and
>> > understood that pll is generating 288Mhz which is inturn divided for CPU
>> as
>> > 48Mhz and peripheral clock as 12Mhz...however my doubt for counter still
>> > remains d same...wat im getin confused is the Prescale counter
>> > Register...is the prescale counter register used to further divide the
>> pclk
>> > frequency for the timer?? or is prescale counter is an individual
>> operating
>> > register that keeps on increamenting at every pclk edge and increments
>> > timer counter wen it matches prescale register...i.e. prescale counter
>> can
>> > only be read and not written!
>> >
>> > On Sat, Jan 28, 2012 at 8:29 PM, rtstofer wrote:
>> >
>> >> **
>>
>> >>
>> >>
>> >>
>> >>
>> >> --- In l..., "rtstofer" wrote:
>> >> > No, read section 7.4 and table 5.1 of the User Manual
>> >> >
>> >> > Richard
>> >> >
>> >>
>> >> Make that table 51 - typo...
>> >>
>> >> Richard
>> >>
>> >>
>> >>
>> >
>> >
>> >
>> > --
>> >
>> > Dev Sampat****
>> >
>> > Cell (Oman): (+968) - 9304 8932****
>> >
>> > Email: d...@gmail.com
>> >
>> >
>> >
>> >
>> >
>> >
>> >
>> >
>> >
2. For example. by 2, 4, 8, 16, etc. I you want 1 Hz from a 12 MHz
clock you'd have to set the prescaler to 12,000,000, which is not a
binary number and probably not possible. To get 1 Hz, you need to
select a prescale division and then set the timer to the necessary
reload count.
DaveS
On Sun, Jan 29, 2012 at 12:50 AM, DeV wrote:
> Thanks DaveS..but does that mean that if my pclk is 12Mhz and i set the
> prescaler as 12Mhz so my clock reference for the timer shud b 1hz...i.e. 1
> cycle (i.e. 1 rising edge) per sec...
>
> On Sun, Jan 29, 2012 at 12:45 PM, David Smead wrote:
>
>> **
>> A prescaler is just a divider ahead to the actual clock.
>>
>> DaveS
>> On Sat, Jan 28, 2012 at 11:50 PM, DeV wrote:
>> > thanks so much Richard...i referred to the keil debug session and
>> > understood that pll is generating 288Mhz which is inturn divided for CPU
>> as
>> > 48Mhz and peripheral clock as 12Mhz...however my doubt for counter still
>> > remains d same...wat im getin confused is the Prescale counter
>> > Register...is the prescale counter register used to further divide the
>> pclk
>> > frequency for the timer?? or is prescale counter is an individual
>> operating
>> > register that keeps on increamenting at every pclk edge and increments
>> > timer counter wen it matches prescale register...i.e. prescale counter
>> can
>> > only be read and not written!
>> >
>> > On Sat, Jan 28, 2012 at 8:29 PM, rtstofer wrote:
>> >
>> >> **
>>
>> >>
>> >>
>> >>
>> >>
>> >> --- In l..., "rtstofer" wrote:
>> >> > No, read section 7.4 and table 5.1 of the User Manual
>> >> >
>> >> > Richard
>> >> >
>> >>
>> >> Make that table 51 - typo...
>> >>
>> >> Richard
>> >>
>> >>
>> >>
>> >
>> >
>> >
>> > --
>> >
>> > Dev Sampat****
>> >
>> > Cell (Oman): (+968) - 9304 8932****
>> >
>> > Email: d...@gmail.com
>> >
>> >
>> >
>> >
>> >
>> >
>> >
>> >
>> >
Reply by ●January 29, 20122012-01-29
But David, Prescale Count register is 32 bit long and v can set it as
12,000,000 or 0x00B71B00 (hexa equivalent of 12,000,000)..y shouldn't this
work?
On Sun, Jan 29, 2012 at 1:13 PM, David Smead wrote:
> **
> You set the prescaler as a division. Usually those are in powers of
> 2. For example. by 2, 4, 8, 16, etc. I you want 1 Hz from a 12 MHz
> clock you'd have to set the prescaler to 12,000,000, which is not a
> binary number and probably not possible. To get 1 Hz, you need to
> select a prescale division and then set the timer to the necessary
> reload count.
>
> DaveS
> On Sun, Jan 29, 2012 at 12:50 AM, DeV wrote:
> > Thanks DaveS..but does that mean that if my pclk is 12Mhz and i set the
> > prescaler as 12Mhz so my clock reference for the timer shud b 1hz...i.e.
> 1
> > cycle (i.e. 1 rising edge) per sec...
> >
> > On Sun, Jan 29, 2012 at 12:45 PM, David Smead
> wrote:
> >
> >> **
>
> >>
> >>
> >> A prescaler is just a divider ahead to the actual clock.
> >>
> >> DaveS
> >>
> >>
> >> On Sat, Jan 28, 2012 at 11:50 PM, DeV wrote:
> >> > thanks so much Richard...i referred to the keil debug session and
> >> > understood that pll is generating 288Mhz which is inturn divided for
> CPU
> >> as
> >> > 48Mhz and peripheral clock as 12Mhz...however my doubt for counter
> still
> >> > remains d same...wat im getin confused is the Prescale counter
> >> > Register...is the prescale counter register used to further divide the
> >> pclk
> >> > frequency for the timer?? or is prescale counter is an individual
> >> operating
> >> > register that keeps on increamenting at every pclk edge and increments
> >> > timer counter wen it matches prescale register...i.e. prescale counter
> >> can
> >> > only be read and not written!
> >> >
> >> > On Sat, Jan 28, 2012 at 8:29 PM, rtstofer
> wrote:
> >> >
> >> >> **
> >>
> >> >>
> >> >>
> >> >>
> >> >>
> >> >> --- In l..., "rtstofer" wrote:
> >> >> > No, read section 7.4 and table 5.1 of the User Manual
> >> >> >
> >> >> > Richard
> >> >> >
> >> >>
> >> >> Make that table 51 - typo...
> >> >>
> >> >> Richard
> >> >>
> >> >>
> >> >>
> >> >
> >> >
> >> >
> >> > --
> >> >
> >> > Dev Sampat****
> >> >
> >> > Cell (Oman): (+968) - 9304 8932****
> >> >
> >> > Email: d...@gmail.com
> >> >
> >> >
> >> >
> >> >
> >> >
> >> >
> >> >
> >> >
> >> >
12,000,000 or 0x00B71B00 (hexa equivalent of 12,000,000)..y shouldn't this
work?
On Sun, Jan 29, 2012 at 1:13 PM, David Smead wrote:
> **
> You set the prescaler as a division. Usually those are in powers of
> 2. For example. by 2, 4, 8, 16, etc. I you want 1 Hz from a 12 MHz
> clock you'd have to set the prescaler to 12,000,000, which is not a
> binary number and probably not possible. To get 1 Hz, you need to
> select a prescale division and then set the timer to the necessary
> reload count.
>
> DaveS
> On Sun, Jan 29, 2012 at 12:50 AM, DeV wrote:
> > Thanks DaveS..but does that mean that if my pclk is 12Mhz and i set the
> > prescaler as 12Mhz so my clock reference for the timer shud b 1hz...i.e.
> 1
> > cycle (i.e. 1 rising edge) per sec...
> >
> > On Sun, Jan 29, 2012 at 12:45 PM, David Smead
> wrote:
> >
> >> **
>
> >>
> >>
> >> A prescaler is just a divider ahead to the actual clock.
> >>
> >> DaveS
> >>
> >>
> >> On Sat, Jan 28, 2012 at 11:50 PM, DeV wrote:
> >> > thanks so much Richard...i referred to the keil debug session and
> >> > understood that pll is generating 288Mhz which is inturn divided for
> CPU
> >> as
> >> > 48Mhz and peripheral clock as 12Mhz...however my doubt for counter
> still
> >> > remains d same...wat im getin confused is the Prescale counter
> >> > Register...is the prescale counter register used to further divide the
> >> pclk
> >> > frequency for the timer?? or is prescale counter is an individual
> >> operating
> >> > register that keeps on increamenting at every pclk edge and increments
> >> > timer counter wen it matches prescale register...i.e. prescale counter
> >> can
> >> > only be read and not written!
> >> >
> >> > On Sat, Jan 28, 2012 at 8:29 PM, rtstofer
> wrote:
> >> >
> >> >> **
> >>
> >> >>
> >> >>
> >> >>
> >> >>
> >> >> --- In l..., "rtstofer" wrote:
> >> >> > No, read section 7.4 and table 5.1 of the User Manual
> >> >> >
> >> >> > Richard
> >> >> >
> >> >>
> >> >> Make that table 51 - typo...
> >> >>
> >> >> Richard
> >> >>
> >> >>
> >> >>
> >> >
> >> >
> >> >
> >> > --
> >> >
> >> > Dev Sampat****
> >> >
> >> > Cell (Oman): (+968) - 9304 8932****
> >> >
> >> > Email: d...@gmail.com
> >> >
> >> >
> >> >
> >> >
> >> >
> >> >
> >> >
> >> >
> >> >
Reply by ●January 29, 20122012-01-29
--- In l..., DeV wrote:
>
> But David, Prescale Count register is 32 bit long and v can set it as
> 12,000,000 or 0x00B71B00 (hexa equivalent of 12,000,000)..y shouldn't this
> work?
Although not all uC timers work this way, the LPC23xx prescale register is indeed a 32 bit register. You can put in anything you want. See section 6.2 of the User Manual.
Timers are more useful if they count time up to, say, 1mS and then cause an interrupt. The interrupt handler can now increment a tick counter and, perhaps, get involved with task switching (RTOS stuff) or, it can simply count up and flash an LED.
Timer interrupts that are very slow (like 1 second) may, or may not, be very useful. I tend to go for the timer generating 1 mS interrupts.
To get useful resolution means the prescaler value may be quite low and the timer match value might be quite high. Don't forget that prescale is n+1 so a count of 2 results in division by 3.
Richard
>
> But David, Prescale Count register is 32 bit long and v can set it as
> 12,000,000 or 0x00B71B00 (hexa equivalent of 12,000,000)..y shouldn't this
> work?
Although not all uC timers work this way, the LPC23xx prescale register is indeed a 32 bit register. You can put in anything you want. See section 6.2 of the User Manual.
Timers are more useful if they count time up to, say, 1mS and then cause an interrupt. The interrupt handler can now increment a tick counter and, perhaps, get involved with task switching (RTOS stuff) or, it can simply count up and flash an LED.
Timer interrupts that are very slow (like 1 second) may, or may not, be very useful. I tend to go for the timer generating 1 mS interrupts.
To get useful resolution means the prescaler value may be quite low and the timer match value might be quite high. Don't forget that prescale is n+1 so a count of 2 results in division by 3.
Richard
Reply by ●January 29, 20122012-01-29
I finally dragged out the manual. The prescale counter increments
every pclk up to the value set in the prescale register.
When it reaches that value, the timer/counter is incremented and the
prescale counter is reset to start over.
So yes, put anything you want in the prescale register. If the
prescale register is 0, then the timer/counter is incremented every
pclk.
DaveS
On Sun, Jan 29, 2012 at 3:35 AM, DeV wrote:
> But David, Prescale Count register is 32 bit long and v can set it as
> 12,000,000 or 0x00B71B00 (hexa equivalent of 12,000,000)..y shouldn't this
> work?
>
> On Sun, Jan 29, 2012 at 1:13 PM, David Smead wrote:
>
>> **
>> You set the prescaler as a division. Usually those are in powers of
>> 2. For example. by 2, 4, 8, 16, etc. I you want 1 Hz from a 12 MHz
>> clock you'd have to set the prescaler to 12,000,000, which is not a
>> binary number and probably not possible. To get 1 Hz, you need to
>> select a prescale division and then set the timer to the necessary
>> reload count.
>>
>> DaveS
>> On Sun, Jan 29, 2012 at 12:50 AM, DeV wrote:
>> > Thanks DaveS..but does that mean that if my pclk is 12Mhz and i set the
>> > prescaler as 12Mhz so my clock reference for the timer shud b 1hz...i.e.
>> 1
>> > cycle (i.e. 1 rising edge) per sec...
>> >
>> > On Sun, Jan 29, 2012 at 12:45 PM, David Smead
>> wrote:
>> >
>> >> **
>>
>> >>
>> >>
>> >> A prescaler is just a divider ahead to the actual clock.
>> >>
>> >> DaveS
>> >>
>> >>
>> >> On Sat, Jan 28, 2012 at 11:50 PM, DeV wrote:
>> >> > thanks so much Richard...i referred to the keil debug session and
>> >> > understood that pll is generating 288Mhz which is inturn divided for
>> CPU
>> >> as
>> >> > 48Mhz and peripheral clock as 12Mhz...however my doubt for counter
>> still
>> >> > remains d same...wat im getin confused is the Prescale counter
>> >> > Register...is the prescale counter register used to further divide the
>> >> pclk
>> >> > frequency for the timer?? or is prescale counter is an individual
>> >> operating
>> >> > register that keeps on increamenting at every pclk edge and increments
>> >> > timer counter wen it matches prescale register...i.e. prescale counter
>> >> can
>> >> > only be read and not written!
>> >> >
>> >> > On Sat, Jan 28, 2012 at 8:29 PM, rtstofer
>> wrote:
>> >> >
>> >> >> **
>> >>
>> >> >>
>> >> >>
>> >> >>
>> >> >>
>> >> >> --- In l..., "rtstofer" wrote:
>> >> >> > No, read section 7.4 and table 5.1 of the User Manual
>> >> >> >
>> >> >> > Richard
>> >> >> >
>> >> >>
>> >> >> Make that table 51 - typo...
>> >> >>
>> >> >> Richard
>> >> >>
>> >> >>
>> >> >>
>> >> >
>> >> >
>> >> >
>> >> > --
>> >> >
>> >> > Dev Sampat****
>> >> >
>> >> > Cell (Oman): (+968) - 9304 8932****
>> >> >
>> >> > Email: d...@gmail.com
>> >> >
>> >> >
>> >> >
>> >> >
>> >> >
>> >> >
>> >> >
>> >> >
>> >> >
every pclk up to the value set in the prescale register.
When it reaches that value, the timer/counter is incremented and the
prescale counter is reset to start over.
So yes, put anything you want in the prescale register. If the
prescale register is 0, then the timer/counter is incremented every
pclk.
DaveS
On Sun, Jan 29, 2012 at 3:35 AM, DeV wrote:
> But David, Prescale Count register is 32 bit long and v can set it as
> 12,000,000 or 0x00B71B00 (hexa equivalent of 12,000,000)..y shouldn't this
> work?
>
> On Sun, Jan 29, 2012 at 1:13 PM, David Smead wrote:
>
>> **
>> You set the prescaler as a division. Usually those are in powers of
>> 2. For example. by 2, 4, 8, 16, etc. I you want 1 Hz from a 12 MHz
>> clock you'd have to set the prescaler to 12,000,000, which is not a
>> binary number and probably not possible. To get 1 Hz, you need to
>> select a prescale division and then set the timer to the necessary
>> reload count.
>>
>> DaveS
>> On Sun, Jan 29, 2012 at 12:50 AM, DeV wrote:
>> > Thanks DaveS..but does that mean that if my pclk is 12Mhz and i set the
>> > prescaler as 12Mhz so my clock reference for the timer shud b 1hz...i.e.
>> 1
>> > cycle (i.e. 1 rising edge) per sec...
>> >
>> > On Sun, Jan 29, 2012 at 12:45 PM, David Smead
>> wrote:
>> >
>> >> **
>>
>> >>
>> >>
>> >> A prescaler is just a divider ahead to the actual clock.
>> >>
>> >> DaveS
>> >>
>> >>
>> >> On Sat, Jan 28, 2012 at 11:50 PM, DeV wrote:
>> >> > thanks so much Richard...i referred to the keil debug session and
>> >> > understood that pll is generating 288Mhz which is inturn divided for
>> CPU
>> >> as
>> >> > 48Mhz and peripheral clock as 12Mhz...however my doubt for counter
>> still
>> >> > remains d same...wat im getin confused is the Prescale counter
>> >> > Register...is the prescale counter register used to further divide the
>> >> pclk
>> >> > frequency for the timer?? or is prescale counter is an individual
>> >> operating
>> >> > register that keeps on increamenting at every pclk edge and increments
>> >> > timer counter wen it matches prescale register...i.e. prescale counter
>> >> can
>> >> > only be read and not written!
>> >> >
>> >> > On Sat, Jan 28, 2012 at 8:29 PM, rtstofer
>> wrote:
>> >> >
>> >> >> **
>> >>
>> >> >>
>> >> >>
>> >> >>
>> >> >>
>> >> >> --- In l..., "rtstofer" wrote:
>> >> >> > No, read section 7.4 and table 5.1 of the User Manual
>> >> >> >
>> >> >> > Richard
>> >> >> >
>> >> >>
>> >> >> Make that table 51 - typo...
>> >> >>
>> >> >> Richard
>> >> >>
>> >> >>
>> >> >>
>> >> >
>> >> >
>> >> >
>> >> > --
>> >> >
>> >> > Dev Sampat****
>> >> >
>> >> > Cell (Oman): (+968) - 9304 8932****
>> >> >
>> >> > Email: d...@gmail.com
>> >> >
>> >> >
>> >> >
>> >> >
>> >> >
>> >> >
>> >> >
>> >> >
>> >> >
