Hi
> The project is complete. As I said you should
download an evaluate
> version of Keil that should have everything. In www.lpcware. there is
> also a zip archive containing all the Hitex BSDs, may be that Hitex
> updated it only on their web sites you can check also there.
There are a various number of CGU_init() functions out there and every one
is a bit different.
Anyway, EA confirmed that the board does only run 144/72 (or as my tests
show 96/96).
--
42Bastian
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| http://www.sciopta.com
| Fastest direct message passing kernel.
| IEC61508 certified.
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LPC4357 && 204MHz && SDRAM ??
Started by ●February 3, 2013
Reply by ●February 8, 20132013-02-08
Reply by ●February 8, 20132013-02-08
Vladimir
> If you are interested in my init code - no problem, I can send it. My interest is EA schematic.
I hope you understand that I cannot share information w/o my copyright.
--
42Bastian
+
| http://www.sciopta.com
| Fastest direct message passing kernel.
| IEC61508 certified.
+
> If you are interested in my init code - no problem, I can send it. My interest is EA schematic.
I hope you understand that I cannot share information w/o my copyright.
--
42Bastian
+
| http://www.sciopta.com
| Fastest direct message passing kernel.
| IEC61508 certified.
+
Reply by ●February 8, 20132013-02-08
Hi MD
> Now working with my own board with a LPC4337 installed, running the
> same code with some tweaks, I can run 96/96 but not 192/96! Which does
> not make sense to me.
Same here. But even 156/78 does not work.
--
42Bastian
+
| http://www.sciopta.com
| Fastest direct message passing kernel.
| IEC61508 certified.
+
> Now working with my own board with a LPC4337 installed, running the
> same code with some tweaks, I can run 96/96 but not 192/96! Which does
> not make sense to me.
Same here. But even 156/78 does not work.
--
42Bastian
+
| http://www.sciopta.com
| Fastest direct message passing kernel.
| IEC61508 certified.
+
Reply by ●February 8, 20132013-02-08
Hi
> My lpcware post might have been confusing... I never downloaded code to
> the SDRAM via the debugger. The problem was accessing EMC (just a
> *((uint32_t*)0x28000000) in the code) would crash the chip, no
> exception vectors would run. The debugger clouded the issue, because
> as long I was running under the debugger everything worked fine. Code
> was always running from internal flash.
Same with me, only that in my case, the debugger looses connection to the
chip. Running w/o debugger does no crash (but of course SDRAM does no work
either).
--
42Bastian
+
| http://www.sciopta.com
| Fastest direct message passing kernel.
| IEC61508 certified.
+
> My lpcware post might have been confusing... I never downloaded code to
> the SDRAM via the debugger. The problem was accessing EMC (just a
> *((uint32_t*)0x28000000) in the code) would crash the chip, no
> exception vectors would run. The debugger clouded the issue, because
> as long I was running under the debugger everything worked fine. Code
> was always running from internal flash.
Same with me, only that in my case, the debugger looses connection to the
chip. Running w/o debugger does no crash (but of course SDRAM does no work
either).
--
42Bastian
+
| http://www.sciopta.com
| Fastest direct message passing kernel.
| IEC61508 certified.
+
Reply by ●February 8, 20132013-02-08
Hi
> You did a good job, I spent a couple of months debugging LPC43xx,
> libraries, tools and writing my application examplesfor NXP exercising
> the dual core communications using every type of memory on the Hitex
> board so I feel it is a power horse, very configurable but of course it
> needs also more attention to every detail.
Hmm, so why does the NXP CGU_init switch the CPU only to 72MHz?
--
42Bastian
+
| http://www.sciopta.com
| Fastest direct message passing kernel.
| IEC61508 certified.
+
> You did a good job, I spent a couple of months debugging LPC43xx,
> libraries, tools and writing my application examplesfor NXP exercising
> the dual core communications using every type of memory on the Hitex
> board so I feel it is a power horse, very configurable but of course it
> needs also more attention to every detail.
Hmm, so why does the NXP CGU_init switch the CPU only to 72MHz?
--
42Bastian
+
| http://www.sciopta.com
| Fastest direct message passing kernel.
| IEC61508 certified.
+
Reply by ●February 8, 20132013-02-08
Hi, Bastian,
>> I cannot share information w/o my copyright.
Sure.
I've ordered already a new starter kit with SDRAM same type as I use.
Best regards
Vladimir
----- Original Message -----
From: 42Bastian
To: l...
Sent: Friday, February 08, 2013 9:26 AM
Subject: Re: [lpc2000] LPC4357 && 204MHz && SDRAM ??
Vladimir
> If you are interested in my init code - no problem, I can send it. My interest is EA schematic.
I hope you understand that I cannot share information w/o my copyright.
--
42Bastian
+
| http://www.sciopta.com
| Fastest direct message passing kernel.
| IEC61508 certified.
+
>> I cannot share information w/o my copyright.
Sure.
I've ordered already a new starter kit with SDRAM same type as I use.
Best regards
Vladimir
----- Original Message -----
From: 42Bastian
To: l...
Sent: Friday, February 08, 2013 9:26 AM
Subject: Re: [lpc2000] LPC4357 && 204MHz && SDRAM ??
Vladimir
> If you are interested in my init code - no problem, I can send it. My interest is EA schematic.
I hope you understand that I cannot share information w/o my copyright.
--
42Bastian
+
| http://www.sciopta.com
| Fastest direct message passing kernel.
| IEC61508 certified.
+
Reply by ●February 8, 20132013-02-08
Il 08/02/2013 07:32, 42Bastian ha scritto:
>
>
> Hi
>
> > You did a good job, I spent a couple of months debugging LPC43xx,
> > libraries, tools and writing my application examplesfor NXP exercising
> > the dual core communications using every type of memory on the Hitex
> > board so I feel it is a power horse, very configurable but of course it
> > needs also more attention to every detail.
>
> Hmm, so why does the NXP CGU_init switch the CPU only to 72MHz?
>
You can't assume that CGU_init() is correct. Make a try with the copy I
sent some days ago, in LPC43xx clocks setup is a little bit complicated
and if you don't read very carefully the user manual can become a
nightmare. Generally speaking with the wrong setup you can't be able to
drive the EMC at same clock frequency of the cpu. There are 2 clocks
that may drive the EMC: CLK_M4_EMC and CLK_M4_EMC_DIV.
The 1st can run at the same frequency of BASE_M4_CLK that for a LPC4357
is 204MHz so you could drive a SDRAM at the same frequency. The problem
is that 120MHx SDRAM are more common than others so the EMC and CGU
setup may be written to 204/2 = 102MHz. The problem is that in
evaluation boards if the vendor finds different SDRAM at higher
frequencies it is difficult that updates the examples.
But you can program EMC to be driven from the M4 CLK.
> --
> 42Bastian
> +
> | http://www.sciopta.com
> | Fastest direct message passing kernel.
> | IEC61508 certified.
> +
>
>
> Hi
>
> > You did a good job, I spent a couple of months debugging LPC43xx,
> > libraries, tools and writing my application examplesfor NXP exercising
> > the dual core communications using every type of memory on the Hitex
> > board so I feel it is a power horse, very configurable but of course it
> > needs also more attention to every detail.
>
> Hmm, so why does the NXP CGU_init switch the CPU only to 72MHz?
>
You can't assume that CGU_init() is correct. Make a try with the copy I
sent some days ago, in LPC43xx clocks setup is a little bit complicated
and if you don't read very carefully the user manual can become a
nightmare. Generally speaking with the wrong setup you can't be able to
drive the EMC at same clock frequency of the cpu. There are 2 clocks
that may drive the EMC: CLK_M4_EMC and CLK_M4_EMC_DIV.
The 1st can run at the same frequency of BASE_M4_CLK that for a LPC4357
is 204MHz so you could drive a SDRAM at the same frequency. The problem
is that 120MHx SDRAM are more common than others so the EMC and CGU
setup may be written to 204/2 = 102MHz. The problem is that in
evaluation boards if the vendor finds different SDRAM at higher
frequencies it is difficult that updates the examples.
But you can program EMC to be driven from the M4 CLK.
> --
> 42Bastian
> +
> | http://www.sciopta.com
> | Fastest direct message passing kernel.
> | IEC61508 certified.
> +
