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CAN baudrate setting

Started by mouaaz February 21, 2005

Dear all,

I am using two LPC2129 boards having 12 MHz clock, with CCLK and PCLK
set to 60 MHz. They are connected via a CAN link. I am trying to set
the bus timing register C1BTR to run the CAN at the baudrate of 1
Mbit/s. The value I tried is :

C1BTR = 0x34C005;

But it did not work.

Anybody can help me to work out the correct setting of this register
to let the CAN go for 1 Mbaud.

Thanks very much.

Mouaaz

PS. the correct setting for 125 kbaud was: C1BTR = 0x001C001D;



An Engineer's Guide to the LPC2100 Series


Dear all,

I am using two LPC2129 boards having 12 MHz clock, with CCLK and PCLK
set to 60 MHz. They are connected via a CAN link. I am trying to set
the bus timing register C1BTR to run the CAN at the baudrate of 1
Mbit/s. The value I tried is :

C1BTR = 0x34C005;

But it did not work.

Anybody can help me to work out the correct setting of this register
to let the CAN go for 1 Mbaud.

Thanks very much.

Mouaaz

PS. the correct setting for 125 kbaud was: C1BTR = 0x001C001D;



I've tried making a spreadsheet for this, but I haven't had a chance
to actually test the timings. But here are the answers I come up
with. These calculations are for SAM = 1 only.

Solution Set #1:
BRP = 15
SJW = 4
TSeg2 = 4-6
TSeg1 = 10-8
TSeg1 + Tseg2 should be 14

So the values for this set should be
0x0057C00F (Tseg1 = 8)
0x0048C00F (Tseg1 = 9)
0x0039C00F (Tseg1 = 10)

Solution Set #2:
BRP = 10
SJW = 3-4
Tseg2 = 3-4
Tseg1 = 6-5
Tseg1 + Tseg2 = 9
0x0025800A (SJW = 3, Tseg2=3, Tseg1 = 6)
You can probably figure the rest of them out.

Solution Set #3
BRP = 6
SJW = 2-4
Tseg2 = 2
Tseg1 = 3

Please let me know if any of these work. If my spreadsheet works,
then I might post it, but I won't get a chance to test any of this
works for a couple of weeks.

Assumptions made, deltaF = 1%, bus length = 10 meters max, propagation
time = 6.5m/ns, logic delay and loop delay = 200ns

--Peter

--- In , "mouaaz" <mouaaz@y...> wrote:
>
> Dear all,
>
> I am using two LPC2129 boards having 12 MHz clock, with CCLK and PCLK
> set to 60 MHz. They are connected via a CAN link. I am trying to set
> the bus timing register C1BTR to run the CAN at the baudrate of 1
> Mbit/s. The value I tried is :
>
> C1BTR = 0x34C005;
>
> But it did not work.
>
> Anybody can help me to work out the correct setting of this register
> to let the CAN go for 1 Mbaud.
>
> Thanks very much.
>
> Mouaaz
>
> PS. the correct setting for 125 kbaud was: C1BTR = 0x001C001D;




Hi Mouaaz,

the Rules of Bit Timing Parameters are not described in the Philips
LPC2000 User Manuals. And they are not easy. Please refer to the
Bosch Homepage for more Information.
But, I give you an Example that works very well in my application:

Assumed that you setup the PLL and the cclk = 60 MHz and the VPB
Divider = 4 (after RESET) and the pclk = 15 MHz, you can use the
following parameters for a first test:

// Common CAN bit rates for cclk` MHz, VPBDIV=4: ==> pclk MHz:
// CAN Bit Timings in Detail --> // SAM TSEG1 TSEG2 SJW SP% BRP
#define CANBit10k_15MHz 0x25C095 // 0+1 5+1 2+1 3+1 70 149+1
#define CANBit25k_15MHz 0x25C03B // 0+1 5+1 2+1 3+1 70 59+1
#define CANBit50k_15MHz 0x25C01D // 0+1 5+1 2+1 3+1 70 29+1
#define CANBit100k_15MHz 0x25C00E // 0+1 5+1 2+1 3+1 70 14+1
#define CANBit125k_15MHz 0x25C00B // 0+1 5+1 2+1 3+1 70 11+1
#define CANBit250k_15MHz 0x25C005 // 0+1 5+1 2+1 3+1 70 5+1
#define CANBit500k_15MHz 0x25C002 // 0+1 5+1 2+1 3+1 70 2+1
#define CANBit1000k_15MHz 0x48C000 // 0+1 8+1 4+1 3+1 67 0+1

The following parameters for VPBDIV = 1 I have calculated on this
base:

For cclk = 60 MHz and VPBDIV = 1, the following parameters should
work:

// Common CAN bit rates for cclk` MHz, VPBDIV=1: ==> pclk` MHz:
// CAN Bit Timings in Detail --> // SAM TSEG1 TSEG2 SJW SP% BRP
#define CANBit10k_60MHz 0x25C257 // 0+1 5+1 2+1 3+1 70 599+1
#define CANBit25k_60MHz 0x25C0EF // 0+1 5+1 2+1 3+1 70 239+1
#define CANBit50k_60MHz 0x25C077 // 0+1 5+1 2+1 3+1 70 119+1
#define CANBit100k_60MHz 0x25C03B // 0+1 5+1 2+1 3+1 70 59+1
#define CANBit125k_60MHz 0x25C02F // 0+1 5+1 2+1 3+1 70 47+1
#define CANBit250k_60MHz 0x25C017 // 0+1 5+1 2+1 3+1 70 23+1
#define CANBit500k_60MHz 0x25C00B // 0+1 5+1 2+1 3+1 70 11+1
#define CANBit1000k_60MHz 0x48C003 // 0+1 8+1 4+1 3+1 67 3+1

Write this Values to the CANBTR Register.

The defined CAN Bit Rates works very well in my application (Keil
MCB2100 connected to a CAN Analyzer (CANalyzer from vector
informatik)).

The right Bit Rate Calculation is:

Bit rate = cclk / ( VPBDIV * BRP * ( TSEG1+1 + 1 + TSEG2+1))

The Sample Point should be in the Range 50% to 90 %.

Please download the Keil Examples for a CAN Driver, that was very
helpful for me:

http://www.keil.com/download/docs/lpc2_can_examples.zip.asp

Greetings from Dietmar.

http://www.weiss-electronic.de

-----------------------------

--- In , "mouaaz" <mouaaz@y...> wrote:
>
> Dear all,
>
> I am using two LPC2129 boards having 12 MHz clock, with CCLK and
PCLK
> set to 60 MHz. They are connected via a CAN link. I am trying to set
> the bus timing register C1BTR to run the CAN at the baudrate of 1
> Mbit/s. The value I tried is :
>
> C1BTR = 0x34C005;
>
> But it did not work.
>
> Anybody can help me to work out the correct setting of this register
> to let the CAN go for 1 Mbaud.
>
> Thanks very much.
>
> Mouaaz
>
> PS. the correct setting for 125 kbaud was: C1BTR = 0x001C001D;



Dear all:

I use LPC2292s CAN , But I cant use its filter properly.

2292 has two cans, I let can1 send data to can2. If I disable the
filter,the data is properly received, But if I enable the filter, I see that
the CANRFS,CANRID,CANRDA and CANRDB has received the data properly, but the
RBS bit is not set to 1. I set the filter ram as the datasheet say, and
I have set the SFF_sa,SFF_GRP_sa,EFF_sa,EFF_GRP_sa and EndOfTable, I have
set AFMR to 0x00 and filled the unused ram to 0xf7fff7ff. I dont know way.
Is there anyother thing I should do?

Thanks very much.

wangjie

<http://us.ard.yahoo.com/SIG9m78jah/M)8184.6018725.7038619.3001176/D=gr
oups/S06554205:HM/EXP10147452/A%93423/R=0/SIGel9gslf/*http:/www.n
etflix.com/Default?mqso`190075> click here
<http://us.adserver.yahoo.com/l?M)8184.6018725.7038619.3001176/D=groups/S=
:HM/A%93423/randx1346541
_____

> Terms of Service.



See post below for full text I'm replying to...

From: dietmar_wengler [mailto:]
Sent: Saturday, March 05, 2005 4:17 PM
To:
Subject: [lpc2000] Re: CAN baudrate setting

> Please download the Keil Examples for a CAN Driver, that was
> very helpful for me:
> http://www.keil.com/download/docs/lpc2_can_examples.zip.asp

I have the files from the Keil link above, but it does not match/jive with
what you have posted.

The CANALL source code has the following define:

// Common CAN bit rates
#define CANBitrate125k_12MHz 0x001C001D
#define CANBitrate250k_12MHz 0x001C000E

I've ran CANALL on my LPC2194 design and on Keil's MCB2100 and the above
numbers work fine. Both boards have a 12Mhz crystal, 60Mhz internal
clock, VPDIV=1;

You say:

#define CANBit125k_60MHz 0x25C02F // 0+1 5+1 2+1 3+1 70 47+1
#define CANBit250k_60MHz 0x25C017 // 0+1 5+1 2+1 3+1 70 23+1

Those are WAY off from what I know to work.
Am I missing something?

Greg Deuerling
Fermi National Accelerator Laboratory
Feynman Computing Center, Room 370, MS 368
P.O.Box 500 Batavia, IL 60510
(630)840-4629 FAX (630)840-5406
Electronic Systems Engineering Group
Work:
Personal:


________________________________________
From: dietmar_wengler [mailto:]
Sent: Saturday, March 05, 2005 4:17 PM
To:
Subject: [lpc2000] Re: CAN baudrate setting Hi Mouaaz,

the Rules of Bit Timing Parameters are not described in the Philips
LPC2000 User Manuals. And they are not easy. Please refer to the
Bosch Homepage for more Information.
But, I give you an Example that works very well in my application:

Assumed that you setup the PLL and the cclk = 60 MHz and the VPB
Divider = 4 (after RESET) and the pclk = 15 MHz, you can use the
following parameters for a first test:

// Common CAN bit rates for cclk` MHz, VPBDIV=4: ==> pclk MHz:
// CAN Bit Timings in Detail --> // SAM TSEG1 TSEG2 SJW SP% BRP
#define CANBit10k_15MHz 0x25C095 // 0+1 5+1 2+1 3+1 70 149+1
#define CANBit25k_15MHz 0x25C03B // 0+1 5+1 2+1 3+1 70 59+1
#define CANBit50k_15MHz 0x25C01D // 0+1 5+1 2+1 3+1 70 29+1
#define CANBit100k_15MHz 0x25C00E // 0+1 5+1 2+1 3+1 70 14+1
#define CANBit125k_15MHz 0x25C00B // 0+1 5+1 2+1 3+1 70 11+1
#define CANBit250k_15MHz 0x25C005 // 0+1 5+1 2+1 3+1 70 5+1
#define CANBit500k_15MHz 0x25C002 // 0+1 5+1 2+1 3+1 70 2+1
#define CANBit1000k_15MHz 0x48C000 // 0+1 8+1 4+1 3+1 67 0+1

The following parameters for VPBDIV = 1 I have calculated on this
base:

For cclk = 60 MHz and VPBDIV = 1, the following parameters should
work:

// Common CAN bit rates for cclk` MHz, VPBDIV=1: ==> pclk` MHz:
// CAN Bit Timings in Detail --> // SAM TSEG1 TSEG2 SJW SP% BRP
#define CANBit10k_60MHz 0x25C257 // 0+1 5+1 2+1 3+1 70 599+1
#define CANBit25k_60MHz 0x25C0EF // 0+1 5+1 2+1 3+1 70 239+1
#define CANBit50k_60MHz 0x25C077 // 0+1 5+1 2+1 3+1 70 119+1
#define CANBit100k_60MHz 0x25C03B // 0+1 5+1 2+1 3+1 70 59+1
#define CANBit125k_60MHz 0x25C02F // 0+1 5+1 2+1 3+1 70 47+1
#define CANBit250k_60MHz 0x25C017 // 0+1 5+1 2+1 3+1 70 23+1
#define CANBit500k_60MHz 0x25C00B // 0+1 5+1 2+1 3+1 70 11+1
#define CANBit1000k_60MHz 0x48C003 // 0+1 8+1 4+1 3+1 67 3+1

Write this Values to the CANBTR Register.

The defined CAN Bit Rates works very well in my application (Keil
MCB2100 connected to a CAN Analyzer (CANalyzer from vector
informatik)).

The right Bit Rate Calculation is:

Bit rate = cclk / ( VPBDIV * BRP * ( TSEG1+1 + 1 + TSEG2+1))

The Sample Point should be in the Range 50% to 90 %.

Please download the Keil Examples for a CAN Driver, that was very
helpful for me:

http://www.keil.com/download/docs/lpc2_can_examples.zip.asp

Greetings from Dietmar.

http://www.weiss-electronic.de

-----------------------------

--- In , "mouaaz" <mouaaz@y...> wrote:
>
> Dear all,
>
> I am using two LPC2129 boards having 12 MHz clock, with CCLK and
PCLK
> set to 60 MHz. They are connected via a CAN link. I am trying to set
> the bus timing register C1BTR to run the CAN at the baudrate of 1
> Mbit/s. The value I tried is :
>
> C1BTR = 0x34C005;
>
> But it did not work.
>
> Anybody can help me to work out the correct setting of this register
> to let the CAN go for 1 Mbaud.
>
> Thanks very much.
>
> Mouaaz
>
> PS. the correct setting for 125 kbaud was: C1BTR = 0x001C001D;

________________________________________
Yahoo! Groups Links
To



The Keil examples do indeed work right. The following:
#define CANBit125k_60MHz 0x25C02F // 0+1 5+1 2+1 3+1 70 47+1
also works right. He has changed the sampling intervals which is
why it looks so "wrong". His comment with all those magic numbers
is a note about it.
James
--- In , Greg Deuerling <egads@f...> wrote:
>
> See post below for full text I'm replying to...
>
> From: dietmar_wengler [mailto:dietmar_wengler@y...]
> Sent: Saturday, March 05, 2005 4:17 PM
> To:
> Subject: [lpc2000] Re: CAN baudrate setting
>
> > Please download the Keil Examples for a CAN Driver, that was
> > very helpful for me:
> > http://www.keil.com/download/docs/lpc2_can_examples.zip.asp
>
> I have the files from the Keil link above, but it does not
match/jive with
> what you have posted.
>
> The CANALL source code has the following define:
>
> // Common CAN bit rates
> #define CANBitrate125k_12MHz 0x001C001D
> #define CANBitrate250k_12MHz 0x001C000E
>
> I've ran CANALL on my LPC2194 design and on Keil's MCB2100 and the
above
> numbers work fine. Both boards have a 12Mhz crystal, 60Mhz
internal
> clock, VPDIV=1;
>
> You say:
>
> #define CANBit125k_60MHz 0x25C02F // 0+1 5+1 2+1 3+1 70 47+1
> #define CANBit250k_60MHz 0x25C017 // 0+1 5+1 2+1 3+1 70 23+1
>
> Those are WAY off from what I know to work.
> Am I missing something?
>
> Greg Deuerling
> Fermi National Accelerator Laboratory
> Feynman Computing Center, Room 370, MS 368
> P.O.Box 500 Batavia, IL 60510
> (630)840-4629 FAX (630)840-5406
> Electronic Systems Engineering Group
> Work: egads@f...
> Personal: gdeuerling@c...
>
>
> ________________________________________
> From: dietmar_wengler [mailto:dietmar_wengler@y...]
> Sent: Saturday, March 05, 2005 4:17 PM
> To:
> Subject: [lpc2000] Re: CAN baudrate setting > Hi Mouaaz,
>
> the Rules of Bit Timing Parameters are not described in the
Philips
> LPC2000 User Manuals. And they are not easy. Please refer to the
> Bosch Homepage for more Information.
> But, I give you an Example that works very well in my application:
>
> Assumed that you setup the PLL and the cclk = 60 MHz and the VPB
> Divider = 4 (after RESET) and the pclk = 15 MHz, you can use the
> following parameters for a first test:
>
> // Common CAN bit rates for cclk` MHz, VPBDIV=4: ==> pclk MHz:
> // CAN Bit Timings in Detail --> // SAM TSEG1 TSEG2 SJW SP% BRP
> #define CANBit10k_15MHz 0x25C095 // 0+1 5+1 2+1 3+1 70 149+1
> #define CANBit25k_15MHz 0x25C03B // 0+1 5+1 2+1 3+1 70 59+1
> #define CANBit50k_15MHz 0x25C01D // 0+1 5+1 2+1 3+1 70 29+1
> #define CANBit100k_15MHz 0x25C00E // 0+1 5+1 2+1 3+1 70 14+1
> #define CANBit125k_15MHz 0x25C00B // 0+1 5+1 2+1 3+1 70 11+1
> #define CANBit250k_15MHz 0x25C005 // 0+1 5+1 2+1 3+1 70 5+1
> #define CANBit500k_15MHz 0x25C002 // 0+1 5+1 2+1 3+1 70 2+1
> #define CANBit1000k_15MHz 0x48C000 // 0+1 8+1 4+1 3+1 67 0+1
>
> The following parameters for VPBDIV = 1 I have calculated on this
> base:
>
> For cclk = 60 MHz and VPBDIV = 1, the following parameters should
> work:
>
> // Common CAN bit rates for cclk` MHz, VPBDIV=1: ==> pclk` MHz:
> // CAN Bit Timings in Detail --> // SAM TSEG1 TSEG2 SJW SP% BRP
> #define CANBit10k_60MHz 0x25C257 // 0+1 5+1 2+1 3+1 70 599+1
> #define CANBit25k_60MHz 0x25C0EF // 0+1 5+1 2+1 3+1 70 239+1
> #define CANBit50k_60MHz 0x25C077 // 0+1 5+1 2+1 3+1 70 119+1
> #define CANBit100k_60MHz 0x25C03B // 0+1 5+1 2+1 3+1 70 59+1
> #define CANBit125k_60MHz 0x25C02F // 0+1 5+1 2+1 3+1 70 47+1
> #define CANBit250k_60MHz 0x25C017 // 0+1 5+1 2+1 3+1 70 23+1
> #define CANBit500k_60MHz 0x25C00B // 0+1 5+1 2+1 3+1 70 11+1
> #define CANBit1000k_60MHz 0x48C003 // 0+1 8+1 4+1 3+1 67 3+1
>
> Write this Values to the CANBTR Register.
>
> The defined CAN Bit Rates works very well in my application (Keil
> MCB2100 connected to a CAN Analyzer (CANalyzer from vector
> informatik)).
>
> The right Bit Rate Calculation is:
>
> Bit rate = cclk / ( VPBDIV * BRP * ( TSEG1+1 + 1 + TSEG2+1))
>
> The Sample Point should be in the Range 50% to 90 %.
>
> Please download the Keil Examples for a CAN Driver, that was very
> helpful for me:
>
> http://www.keil.com/download/docs/lpc2_can_examples.zip.asp
>
> Greetings from Dietmar.
>
> http://www.weiss-electronic.de
>
> -----------------------------
>
> --- In , "mouaaz" <mouaaz@y...> wrote:
> >
> > Dear all,
> >
> > I am using two LPC2129 boards having 12 MHz clock, with CCLK and
> PCLK
> > set to 60 MHz. They are connected via a CAN link. I am trying to
set
> > the bus timing register C1BTR to run the CAN at the baudrate of 1
> > Mbit/s. The value I tried is :
> >
> > C1BTR = 0x34C005;
> >
> > But it did not work.
> >
> > Anybody can help me to work out the correct setting of this
register
> > to let the CAN go for 1 Mbaud.
> >
> > Thanks very much.
> >
> > Mouaaz
> >
> > PS. the correct setting for 125 kbaud was: C1BTR = 0x001C001D; >
>
> ________________________________________
> Yahoo! Groups Links
> To




Hi Mouaaz,

sorry, but there was a little error on my bitrate calculation:

instead of:
Bit rate = cclk / ( VPBDIV * BRP * ( TSEG1+1 + 1 + TSEG2+1))

it must be:
Bit rate = cclk / ( VPBDIV * (BRP+1) * ( TSEG1+1 + 1 + TSEG2+1))

Greetings from Dietmar.



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