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I am using an Ashling Vitra JTAG interface here on an Ashling EVBA7 eval board with LPC2106. I am not super familiar with the Ashling tools yet. I am trying to activate the IDLE mode to check power consumption. (When I get this working I will try Power Down mode) When I write to the PCON register (E01FC0C0) the Pathfinder debugger locks up. I need to exit the software, and reset the ICE and sometimes power-cycle the board to regain control. Neither the reset button on the board, nor the EINT0, programmed to be a WAKEUP input, break out of this situation. I can't get out of it with any of the debugger reet commands eoither. Perhps that makes sense, to a degree. IDLE mode is supposed to stop the "processor clock" so does this mean JTAG become inoperative when you actiavte any LPC sleep mode? How can you debug a program with a sleep mode activation if everything hangs ? And maybe htis is just an ill-behaved debugger? I would appreciate any experience you have debugging with an IDLE mode activation, if it worked for you, and any hints on things to look for or try. Thanks. When I get the EINT0 WAKEUP working I will move to timer-initiated wakeups and Power Down mode. -- Brett Delmage <> JSI Telecom |
Does IDLE mode cause JTAG debugger to hang?
Started by ●March 3, 2005
Reply by ●March 3, 20052005-03-03
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It is my understanding that the JTAG debugger cannot handle idle or powerdown modes for the reason that you specified. Richard --- In , Brett Delmage <BDelmage@J...> wrote: > I am using an Ashling Vitra JTAG interface here on an Ashling EVBA7 eval > board with LPC2106. I am not super familiar with the Ashling tools yet. > > I am trying to activate the IDLE mode to check power consumption. (When > I get this working I will try Power Down mode) > > When I write to the PCON register (E01FC0C0) the Pathfinder debugger > locks up. I need to exit the software, and reset the ICE and sometimes > power-cycle the board to regain control. Neither the reset button on the > board, nor the EINT0, programmed to be a WAKEUP input, break out of this > situation. I can't get out of it with any of the debugger reet commands > eoither. > > Perhps that makes sense, to a degree. IDLE mode is supposed to stop the > "processor clock" so does this mean JTAG become inoperative when you > actiavte any LPC sleep mode? How can you debug a program with a sleep > mode activation if everything hangs ? And maybe htis is just an > ill-behaved debugger? > > I would appreciate any experience you have debugging with an IDLE mode > activation, if it worked for you, and any hints on things to look for or > try. Thanks. When I get the EINT0 WAKEUP working I will move to > timer-initiated wakeups and Power Down mode. > > -- > Brett Delmage <BDelmage@J...> > JSI Telecom |
Reply by ●March 3, 20052005-03-03
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The Embedded ICE macrocell (the thing you talk to in the ARM CPU via JTAG) needs the CPU clock active to work. The JTAG speed must be no faster than one sixth of the core clock. Thus, if you stop the core clock, the JTAG will fall over. Also, be aware that if you slow the clock down (eg say to 32kHz), you will need to slow the JTAG clock accordingly. --- In , "Richard" <richas@y...> wrote: > > It is my understanding that the JTAG debugger cannot handle idle or > powerdown modes for the reason that you specified. > > Richard > > --- In , Brett Delmage <BDelmage@J...> wrote: > > I am using an Ashling Vitra JTAG interface here on an Ashling EVBA7 eval > > board with LPC2106. I am not super familiar with the Ashling tools yet. > > > > I am trying to activate the IDLE mode to check power consumption. (When > > I get this working I will try Power Down mode) > > > > When I write to the PCON register (E01FC0C0) the Pathfinder debugger > > locks up. I need to exit the software, and reset the ICE and sometimes > > power-cycle the board to regain control. Neither the reset button on the > > board, nor the EINT0, programmed to be a WAKEUP input, break out of this > > situation. I can't get out of it with any of the debugger reet commands > > eoither. > > > > Perhps that makes sense, to a degree. IDLE mode is supposed to stop the > > "processor clock" so does this mean JTAG become inoperative when you > > actiavte any LPC sleep mode? How can you debug a program with a sleep > > mode activation if everything hangs ? And maybe htis is just an > > ill-behaved debugger? > > > > I would appreciate any experience you have debugging with an IDLE mode > > activation, if it worked for you, and any hints on things to look for or > > try. Thanks. When I get the EINT0 WAKEUP working I will move to > > timer-initiated wakeups and Power Down mode. > > > > -- > > Brett Delmage <BDelmage@J...> > > JSI Telecom |
Reply by ●March 16, 20052005-03-16
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On Thu, 2005-03-03 at 23:33 +0000, embeddedjanitor wrote: > > The Embedded ICE macrocell (the thing you talk to in the ARM CPU via > JTAG) needs the CPU clock active to work. The JTAG speed must be no > faster than one sixth of the core clock. > > Thus, if you stop the core clock, the JTAG will fall over. > > Also, be aware that if you slow the clock down (eg say to 32kHz), you > will need to slow the JTAG clock accordingly. Good points! Thanks for everyone's useful information on this, as always. You make this a wonderful resource. In part because of the existence of your expertise on this list, we are using the LPC instead of some other manufacturer's products. I feel I have learned so much reading this list for the last few months that I would not have found in specs or formal documents. Thanks for your wealth of contributions. Brett |
