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I found this online http://i.cmpnet.com/embedded/europe/esefeb05/esefeb05p34.pdf Maybe philips guys can answer these please Will LPC23xx have PHY built in? How much RAM will it have? Is the USB host or device? Is it going to be 64 pin package? For real TCP/IP application, you need over 128K of FLASH. Why they chose to have only 128K FLASH? The chip should be 256K flash and 32K RAM. Gus |
LPC23xx ethernet
Started by ●March 11, 2005
Reply by ●March 11, 20052005-03-11
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On Fri, 11 Mar 2005 19:13:59 -0000, Gus <> wrote: > For real TCP/IP application, you need over 128K of FLASH. Wrong, see: http://www.sics.se/~adam/uip/ Even if each 8-bit Atmel AVR instruction translated to a 32-bit ARM instruction, the sample stack configuration here: http://www.sics.se/~adam/uip/size.html would occupy less than 32k. -- Bryce Schober |
Reply by ●March 11, 20052005-03-11
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Hi Guys I have an application running on the LPC210x with a 100M LAN over SPI. The code size is about 14k with ARP/IP/ICMP/TCP/UDP/DHCP incl. small application with op-sys and necessary drivers. RAM about 3k.Compiled with IAR compiler...the same program occupies about 30k on an HC12 compiled with GNU. The uIP TCP stack seems to be rather more efficient but it depends a lot on just what it really can do - it is possible to support more or less features in the protocol layers so a comparison is not so black and white. A stack with full support could indeed get rather big. Regards Mark Butcher www.mjbc.ch --- In , Bryce Schober <bryce.schober@g...> wrote: > On Fri, 11 Mar 2005 19:13:59 -0000, Gus <gus_is_working@y...> wrote: > > For real TCP/IP application, you need over 128K of FLASH. > > Wrong, see: http://www.sics.se/~adam/uip/ > > Even if each 8-bit Atmel AVR instruction translated to a 32-bit ARM > instruction, the sample stack configuration here: > http://www.sics.se/~adam/uip/size.html would occupy less than 32k. > > -- > Bryce Schober |
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Re: LPC23xx ethernet
Reply by ●March 11, 20052005-03-11
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Are you using SPI -> Ethernet? What chip?
_____ From: Mark Butcher [mailto:] Sent: Friday, March 11, 2005 12:53 PM To: Subject: [lpc2000] Re: LPC23xx ethernet Hi Guys I have an application running on the LPC210x with a 100M LAN over SPI. The code size is about 14k with ARP/IP/ICMP/TCP/UDP/DHCP incl. small application with op-sys and necessary drivers. RAM about 3k.Compiled with IAR compiler...the same program occupies about 30k on an HC12 compiled with GNU. The uIP TCP stack seems to be rather more efficient but it depends a lot on just what it really can do - it is possible to support more or less features in the protocol layers so a comparison is not so black and white. A stack with full support could indeed get rather big. Regards Mark Butcher www.mjbc.ch --- In , Bryce Schober <bryce.schober@g...> wrote: > On Fri, 11 Mar 2005 19:13:59 -0000, Gus <gus_is_working@y...> wrote: > > For real TCP/IP application, you need over 128K of FLASH. > > Wrong, see: http://www.sics.se/~adam/uip/ > > Even if each 8-bit Atmel AVR instruction translated to a 32-bit ARM > instruction, the sample stack configuration here: > http://www.sics.se/~adam/uip/size.html would occupy less than 32k. > > -- > Bryce Schober <http://us.ard.yahoo.com/SIG9jdk0gg/M)8184.6018725.7038619.3001176/D=gr oups/S06554205:HM/EXP10660803/A%93423/R=0/SIGel9gslf/*http:/www.n etflix.com/Default?mqso`190075> click here <http://us.adserver.yahoo.com/l?M)8184.6018725.7038619.3001176/D=groups/S= :HM/A%93423/randF8241571 _____ > Terms of Service. |
Reply by ●March 11, 20052005-03-11
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Mark For free stacks there is lwip (also originally by Adam Dunkels). I have it running on an LPC w/ a cs8900. Without the web pages it takes up about 50K of flash. I have 256K of flash and a bunch of exteranl RAM so have not tried to optimize it for size. Two smaller commercial alternatives are available from CMX and InterNiche. BTW - what SPI based 100M LAN chip are you using?? I have heard of the one from MicroChip but I thought it was only 10BaseT and wasn't yet available. There is also the W3100A from WizNET that is 10/100 but it's interface is the slower (400kbps) I2C. Regards -Bill Knight R O SoftWare & http://www.theARMPatch.com On Fri, 11 Mar 2005 20:52:32 -0000, Mark Butcher wrote: Hi Guys I have an application running on the LPC210x with a 100M LAN over SPI. The code size is about 14k with ARP/IP/ICMP/TCP/UDP/DHCP incl. small application with op-sys and necessary drivers. RAM about 3k.Compiled with IAR compiler...the same program occupies about 30k on an HC12 compiled with GNU. The uIP TCP stack seems to be rather more efficient but it depends a lot on just what it really can do - it is possible to support more or less features in the protocol layers so a comparison is not so black and white. A stack with full support could indeed get rather big. Regards Mark Butcher www.mjbc.ch --- In , Bryce Schober <bryce.schober@g...> wrote: > On Fri, 11 Mar 2005 19:13:59 -0000, Gus <gus_is_working@y...> wrote: > > For real TCP/IP application, you need over 128K of FLASH. > > Wrong, see: http://www.sics.se/~adam/uip/ > > Even if each 8-bit Atmel AVR instruction translated to a 32-bit ARM > instruction, the sample stack configuration here: > http://www.sics.se/~adam/uip/size.html would occupy less than 32k. > > -- > Bryce Schober |
Reply by ●March 11, 20052005-03-11
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Hi Gus, please understand that we are not releasing too much information yet, the device is still a while out. A couple hints. It is going to be the most powerful ARM7 we made yet. You would like all answers to your questions below except for the package. It might be more on everything than you expect (including the package size ;-) ) More later in the year, please do not push yet, Robert --- In , "Gus" <gus_is_working@y...> wrote: > > I found this online > > http://i.cmpnet.com/embedded/europe/esefeb05/esefeb05p34.pdf > > Maybe philips guys can answer these please > Will LPC23xx have PHY built in? How much RAM will it have? > Is the USB host or device? > Is it going to be 64 pin package? > > For real TCP/IP application, you need over 128K of FLASH. Why they > chose to have only 128K FLASH? The chip should be 256K flash and 32K > RAM. > > Gus |
Reply by ●March 12, 20052005-03-12
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> From: "Gus" <> > Subject: LPC23xx ethernet > For real TCP/IP application, you need over 128K of FLASH. Why > they chose to have only 128K FLASH? The chip should be 256K flash > and 32K RAM. This has been discussed recently on comp.arch.embedded. It triggered us to look at how much RAM we need for our PowerNet system, which has multi-threaded Telnet and web servers (with CGI and ASP). Our low-end implementation runs fine on an LPC2106 with an Asix AX88796 glued onto the GPIO ports. Test show that we can run with 32k RAM, and we believe that if we go to a single-threaded server architecture, we can run in 16k RAM. The code, including the open interpreter, full TCP/IP stack, BSD style API, and all device drivers and diagnostics, occupies 109296 bytes. We could easily reduce this by 20-30% at the loss of easy debugging and testing. For applications that do not require a multi-threaded server architecture, 128k code and 16/32k RAM is enough. 64k RAM makes life comfortable. Stephen -- Stephen Pelc, MicroProcessor Engineering Ltd - More Real, Less Time 133 Hill Lane, Southampton SO15 5AF, England tel: +44 23 80 631441, fax: +44 23 80 339691 web: http://www.mpeltd.demon.co.uk - free VFX Forth downloads |
Reply by ●March 14, 20052005-03-14
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Hi Bill I decided against the cs8900 since it is very big and needs 'simulated' bus lines with the LPC210x. It is also nice to be able connect to a 100MHz hub (not all can do 100 and 10), even if 100M is not necessary for throughput. I am using the MC9S12NE64 from Freescale - HC12 processor with onboard 10/100M LAN. 8k RAM and 64k FLASH - also cheaper than the cs8900 when I last compared. I have the stack optionally running on this chip with the LPC210x simply requesting services (eg. UDP or TCP port) etc. via SPI. Otherwise I let the MC9S12NE64 run as simple LAN<->SPI converter for the stack in the LPC210x. SPI between 2 processors is a bit sensitive since there is no DMA and this is a bottleneck restricting throughput to a couple of M bits/s. I prefer to let the MC9S12NE64 do the stack since the throughput is much higher and the LPC210x doesn't need to bother with the details. The MC9S12NE64 can also take over other jobs since it has quite a few free ports, A/D converters, serial interfaces, I2C etc. As an extension to an LPC210x design it is very practical since it needs only SPI and an IRQ line. A couple of questions: when you say you have external RAM and FLASH you can't be using an LPC210x - or are you reading and writing over 'simulated' bus lines? I do this for some simple peripherals but it is not very fast. Regards Mark Butcher www.mjbc.ch PS. I have written the stack myself to match with my Op-sys. Also it helps get really familiar with TCP/IP and all the internal workings. If something doesn't work properly you can't blame others for it...I decided to make it "IPV6 prepared" after looking at some open source versions which will need a thorough re-work to do this! PPS The MC9S12NE64 has another advantage. By programming it to do LAN<->RS232 convertion it is possible to connect a PC via RS232 (admittedly slow but not teh issue here) to a LAN/the INTERNET and debug the stack with real data in a comfortable environment (eg. Visual Studio) which allows a new service (eg. HDCP, DNS etc.) to be programmed and debugged in a very short time - say a day or so. PPPS I am preparing a board for LPC210x and the new Microchip device (samples should be delivered shortly) so that I can see whether it has some advantages.... --- In , "Bill Knight" <BillK@t...> wrote: > Mark > For free stacks there is lwip (also originally by Adam Dunkels). > I have it running on an LPC w/ a cs8900. Without the web pages > it takes up about 50K of flash. I have 256K of flash and a bunch > of exteranl RAM so have not tried to optimize it for size. Two > smaller commercial alternatives are available from CMX and > InterNiche. > > BTW - what SPI based 100M LAN chip are you using?? I have heard > of the one from MicroChip but I thought it was only 10BaseT and > wasn't yet available. There is also the W3100A from WizNET that > is 10/100 but it's interface is the slower (400kbps) I2C. > > Regards > -Bill Knight > R O SoftWare & > http://www.theARMPatch.com > |
Reply by ●March 14, 20052005-03-14
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Mark Interesting idea - using the MC9S12NE64 as a ethernet coprocessor. I'll need to look into it some more. My LPC board uses a LPC2214/ LPC2292 which have external address and data busses. There is a picture of it at http://www.thearmpatch.com/lpc-sbc2.html. The cs8900 did take a little fussing to get connected properly. As far as I can tell however, it is about half the price of the MC9S12NE64. Still, using the MC9S12NE64 with processors that do not have exeternal busses definitely has its benefits. I'm presently working on a design using an LPC2138 and the WizNET chip. It is targeted for a 3"x4" pcb with a voltage regulator, processor & JTAG, a DB-9 on UART0, battery for the RTC, eeprom, W3100A, PHY, and ethernet connector. Most all of the processor I/O and PHY status lines will be pinned out. I'm hoping to keep the costs low so I can offer it at an attractive price. I've been watching the MicroChip chip and have asked them about availablity. Haven't had a lot of success, just have to keep watching their web site to see when it is available for samples. Have you had any better success? Regards -Bill Knight R O SoftWare &http://www.theARMPatch.com On Mon, 14 Mar 2005 11:45:00 -0000, Mark Butcher wrote: Hi Bill I decided against the cs8900 since it is very big and needs 'simulated' bus lines with the LPC210x. It is also nice to be able connect to a 100MHz hub (not all can do 100 and 10), even if 100M is not necessary for throughput. I am using the MC9S12NE64 from Freescale - HC12 processor with onboard 10/100M LAN. 8k RAM and 64k FLASH - also cheaper than the cs8900 when I last compared. I have the stack optionally running on this chip with the LPC210x simply requesting services (eg. UDP or TCP port) etc. via SPI. Otherwise I let the MC9S12NE64 run as simple LAN<->SPI converter for the stack in the LPC210x. SPI between 2 processors is a bit sensitive since there is no DMA and this is a bottleneck restricting throughput to a couple of M bits/s. I prefer to let the MC9S12NE64 do the stack since the throughput is much higher and the LPC210x doesn't need to bother with the details. The MC9S12NE64 can also take over other jobs since it has quite a few free ports, A/D converters, serial interfaces, I2C etc. As an extension to an LPC210x design it is very practical since it needs only SPI and an IRQ line. A couple of questions: when you say you have external RAM and FLASH you can't be using an LPC210x - or are you reading and writing over 'simulated' bus lines? I do this for some simple peripherals but it is not very fast. Regards Mark Butcher www.mjbc.ch PS. I have written the stack myself to match with my Op-sys. Also it helps get really familiar with TCP/IP and all the internal workings. If something doesn't work properly you can't blame others for it...I decided to make it "IPV6 prepared" after looking at some open source versions which will need a thorough re-work to do this! PPS The MC9S12NE64 has another advantage. By programming it to do LAN<->RS232 convertion it is possible to connect a PC via RS232 (admittedly slow but not teh issue here) to a LAN/the INTERNET and debug the stack with real data in a comfortable environment (eg. Visual Studio) which allows a new service (eg. HDCP, DNS etc.) to be programmed and debugged in a very short time - say a day or so. PPPS I am preparing a board for LPC210x and the new Microchip device (samples should be delivered shortly) so that I can see whether it has some advantages.... --- In , "Bill Knight" <BillK@t...> wrote: > Mark > For free stacks there is lwip (also originally by Adam Dunkels). > I have it running on an LPC w/ a cs8900. Without the web pages > it takes up about 50K of flash. I have 256K of flash and a bunch > of exteranl RAM so have not tried to optimize it for size. Two > smaller commercial alternatives are available from CMX and > InterNiche. > > BTW - what SPI based 100M LAN chip are you using?? I have heard > of the one from MicroChip but I thought it was only 10BaseT and > wasn't yet available. There is also the W3100A from WizNET that > is 10/100 but it's interface is the slower (400kbps) I2C. > > Regards > -Bill Knight > R O SoftWare & > http://www.theARMPatch.com > Yahoo! Groups Links |
Reply by ●March 14, 20052005-03-14
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Mark, All I can say is "wow". Is this a board level product? I don't have the luxury of time to support two microcontrollers and also write my own TCP/IP stack. How much time did it take to write the stack? Did you do it from the ground up or did you adapt someone else's code? James --- In , "Mark Butcher" <M_J_Butcher@I...> wrote: > > Hi Bill > > I decided against the cs8900 since it is very big and > needs 'simulated' bus lines with the LPC210x. It is also nice to be > able connect to a 100MHz hub (not all can do 100 and 10), even if > 100M is not necessary for throughput. > > I am using the MC9S12NE64 from Freescale - HC12 processor with > onboard 10/100M LAN. 8k RAM and 64k FLASH - also cheaper than the > cs8900 when I last compared. > > I have the stack optionally running on this chip with the LPC210x > simply requesting services (eg. UDP or TCP port) etc. via SPI. > Otherwise I let the MC9S12NE64 run as simple LAN<->SPI converter for > the stack in the LPC210x. > > SPI between 2 processors is a bit sensitive since there is no DMA > and this is a bottleneck restricting throughput to a couple of M > bits/s. > > I prefer to let the MC9S12NE64 do the stack since the throughput is > much higher and the LPC210x doesn't need to bother with the details. > The MC9S12NE64 can also take over other jobs since it has quite a > few free ports, A/D converters, serial interfaces, I2C etc. As an > extension to an LPC210x design it is very practical since it needs > only SPI and an IRQ line. > > A couple of questions: when you say you have external RAM and FLASH > you can't be using an LPC210x - or are you reading and writing > over 'simulated' bus lines? I do this for some simple peripherals > but it is not very fast. > > Regards > > Mark Butcher > > www.mjbc.ch > > PS. I have written the stack myself to match with my Op-sys. Also it > helps get really familiar with TCP/IP and all the internal workings. > If something doesn't work properly you can't blame others for it...I > decided to make it "IPV6 prepared" after looking at some open source > versions which will need a thorough re-work to do this! > > PPS The MC9S12NE64 has another advantage. By programming it to do > LAN<->RS232 convertion it is possible to connect a PC via RS232 > (admittedly slow but not teh issue here) to a LAN/the INTERNET and > debug the stack with real data in a comfortable environment (eg. > Visual Studio) which allows a new service (eg. HDCP, DNS etc.) to be > programmed and debugged in a very short time - say a day or so. > > PPPS I am preparing a board for LPC210x and the new Microchip device > (samples should be delivered shortly) so that I can see whether it > has some advantages.... > > > --- In , "Bill Knight" <BillK@t...> wrote: > > Mark > > For free stacks there is lwip (also originally by Adam Dunkels). > > I have it running on an LPC w/ a cs8900. Without the web pages > > it takes up about 50K of flash. I have 256K of flash and a bunch > > of exteranl RAM so have not tried to optimize it for size. Two > > smaller commercial alternatives are available from CMX and > > InterNiche. > > > > BTW - what SPI based 100M LAN chip are you using?? I have heard > > of the one from MicroChip but I thought it was only 10BaseT and > > wasn't yet available. There is also the W3100A from WizNET that > > is 10/100 but it's interface is the slower (400kbps) I2C. > > > > Regards > > -Bill Knight > > R O SoftWare & > > http://www.theARMPatch.com > > |
