http://www.hitex.co.uk/arm/lpc2000book/index.html
I've read through the first couple chapters and ran across a few errors:
Page 12 & 13
Indicates banked registers for FIQ mode are R7-R14. This should be R8-R14.
Refer to page 2-9 of the ARM7TDMI Technical Reference Manual:
http://www.arm.com/pdfs/DDI0210C_7tdmi_r4p1_trm.pdf
Page 52
"program the MEMMAP register to 0x00000002, to force the chip into FLASH
mode and return the user vector table."
FLASH Mode is 0x00000001 not 0x00000002
hitex lpc2000 book errata
Started by ●August 21, 2005
Reply by ●August 24, 20052005-08-24
Good catches, I had not found these yet.
> Page 52
> "program the MEMMAP register to 0x00000002, to force the chip into FLASH
> mode and return the user vector table."
> FLASH Mode is 0x00000001 not 0x00000002
In my copy (a PDF file), this is at page 51. I downloaded the PDF
again (first reprint April 2005) and the remark is still at page 51.
Perhaps you have the hardcopy?
Here are the errata that I have found (there are also a few
typing/spelling errors that I am not listing here). Page numbers refer
to the downloadable PDF file.
Page 28, bottom line: "Appendix A" should read "chapter 6".
Page 46, fifth line from the bottom: "perfected" should read "prefetched".
Page 52, first line: "If there is a valid program ..." should read "If
there is no valid program ...".
Page 73: the example near the bottom of the page sets up EINT1, and
not EINT0 as the comments claim.
Page 88, the equation below the second parapgraph: "Wdperiod = Pclk x
WDTC x 4" should read "Wdperiod = (WDTC x 4) / Pclk".
Page 91: the two equations near the top of the page: "Divisor Pclk/16 x Baud" should read "Divisor = Pclk / (16 x Baud)". The second
equation should also have the parantheses added around the denominator
part.
I have forwarded these errata to the book's author as well a few
months ago (but I have not received a reply).
Kind regards,
Thiadmer
> Page 52
> "program the MEMMAP register to 0x00000002, to force the chip into FLASH
> mode and return the user vector table."
> FLASH Mode is 0x00000001 not 0x00000002
In my copy (a PDF file), this is at page 51. I downloaded the PDF
again (first reprint April 2005) and the remark is still at page 51.
Perhaps you have the hardcopy?
Here are the errata that I have found (there are also a few
typing/spelling errors that I am not listing here). Page numbers refer
to the downloadable PDF file.
Page 28, bottom line: "Appendix A" should read "chapter 6".
Page 46, fifth line from the bottom: "perfected" should read "prefetched".
Page 52, first line: "If there is a valid program ..." should read "If
there is no valid program ...".
Page 73: the example near the bottom of the page sets up EINT1, and
not EINT0 as the comments claim.
Page 88, the equation below the second parapgraph: "Wdperiod = Pclk x
WDTC x 4" should read "Wdperiod = (WDTC x 4) / Pclk".
Page 91: the two equations near the top of the page: "Divisor Pclk/16 x Baud" should read "Divisor = Pclk / (16 x Baud)". The second
equation should also have the parantheses added around the denominator
part.
I have forwarded these errata to the book's author as well a few
months ago (but I have not received a reply).
Kind regards,
Thiadmer
Reply by ●August 24, 20052005-08-24
> In my copy (a PDF file), this is at page 51. I
downloaded the PDF
> again (first reprint April 2005) and the remark is still at page 51.
> Perhaps you have the hardcopy?
Yes, page 51 of book, opposed to PDF page. Thanks for the correction.
Since lpc2000.com has a link to the book, perhaps they might add an eratta
page for book to their site?
Joel
> again (first reprint April 2005) and the remark is still at page 51.
> Perhaps you have the hardcopy?
Yes, page 51 of book, opposed to PDF page. Thanks for the correction.
Since lpc2000.com has a link to the book, perhaps they might add an eratta
page for book to their site?
Joel
Reply by ●September 9, 20052005-09-09
Found another one (although I wish I didn't) - Page 93 in
lpc-ARM-book.pdf.
"The transmit FIFO will also generate interrupts when the transmit holding
register is empty and when the transmit shift register is empty". This would
be nice, because it would solve the problems associated with disabling the
RS485 transmitters at the end of a telegram, but I don't think this is true.
You only get an interrupt when the holding register and FIFO are empty.
This is a good book, though.
Lars Marmsater
"The transmit FIFO will also generate interrupts when the transmit holding
register is empty and when the transmit shift register is empty". This would
be nice, because it would solve the problems associated with disabling the
RS485 transmitters at the end of a telegram, but I don't think this is true.
You only get an interrupt when the holding register and FIFO are empty.
This is a good book, though.
Lars Marmsater
