Hello ,
I have a small soft running on the LPC2138 using CAP0.0 input &
timer0 -1.
I'm using Timer1 as a free running Timer (Pclk = Timer1) 1:1
Clock on CAP0.0 input clock Timer0.
Match Register (MR0) is set to 200.
No need for interrupt.
When Timer0 match MR0 , I stop Timer1 then read it.
Purpose :
Setting of UART on different external clock.
Test :
T0TCR = 0x02;
/* Timer Disable & Reset
*/
T1TCR = 0x02;
T0PC = 0x00;
/* Prescale Counter reg Divide by 1
*/
T1PC = 0x00;
T0CTCR = b00000010
/* Timer0 on falling edge, CAP0.0
*/
T1CTCR = b00000000
/* Timer1 on Pclk
*/
MR0 = SX;
/* Match register = 200
*/
T0MCR = 0x0004;
/* Stop on MR0: the TC and PC will be stopped */
while (!TCR0)
/* and TCR[0] will be set to 0 if
MR0 matches */
From the PDF file , Register T0TCR bit 0 serve as Flag.
I am right or completly lost ?
thanks in advance
Yves
LPC2138 Timer0 & Timer1
Started by ●September 9, 2005
Reply by ●September 9, 20052005-09-09
Hello Yves,
You clearly did reset the TIMER0 and TIMER1 counters by writing 0x02
into the T0TCR and T1TCR respectively. However, keep in mind that a
timer counter will be held in the reset state as long as bit 1 in
the TCR register is 1 (see the description of the Timer Control
Register in the User Manual).
What seems to be missing in your code is a releasing step for both
of the timers, i.e. writing 0x01 into the T0TCR and T1TCR registers.
This step should be performed after you have completely configured
both of the timers.
Having T0MCR=0x04 will only stop the TIMER0 counter, but there will
be no interrupt flag set. In order to have TIMER0 counter stopped
and Match 0 interrupt flag set, write T0MCR=0x05 (see the match
Control Register description, bits 0 & 2).
Once your TIMER0 counter reaches 200, bit MR0 in the TIMER0
Interrupt Register will be set.
Here is a code that configures TIMER0 to count 200 falling edges on
selected CAP0.0:
//TIMER0 setup
T0TCR = 0x02; /* TIMER0 Disable; reset T0TC & T0PC */
T0PR = 0x00000000; /* Reset T0PR */
T0CTCR = 0x02; /* increment TIMER0 on CAP0.0 falling edge */
T0MR0 = 200; /* Match register = 200 */
T0MCR = 0x0005; /* On MR0 Stop T0TC & T0PC and interrupt */
T0TCR = 0x01; /* TIMER0 Enable */
while ((T0IR & 0x01) == 0x00); /* Wait for MR0 <=> 200 counts */
T0IR = 0x01; /* Clear MR0 interrupt flag */
Regards
Philips Apps Team
--- In lpc2000@lpc2..., "yvesr123" <op173039@m...> wrote:
> Hello ,
>
> I have a small soft running on the LPC2138 using CAP0.0 input &
> timer0 -1.
> I'm using Timer1 as a free running Timer (Pclk = Timer1) 1:1
> Clock on CAP0.0 input clock Timer0.
> Match Register (MR0) is set to 200.
> No need for interrupt.
>
> When Timer0 match MR0 , I stop Timer1 then read it.
> Purpose :
> Setting of UART on different external clock.
>
> Test :
>
> T0TCR = 0x02;
> /* Timer Disable & Reset
> */
> T1TCR = 0x02;
> T0PC = 0x00;
> /* Prescale Counter reg Divide by 1
> */
> T1PC = 0x00;
> T0CTCR = b00000010
> /* Timer0 on falling edge, CAP0.0
> */
> T1CTCR = b00000000
> /* Timer1 on Pclk
> */
> MR0 = SX;
> /* Match register = 200
> */
> T0MCR = 0x0004;
> /* Stop on MR0: the TC and PC will be stopped */
> while (!TCR0)
> /* and TCR[0] will be set to 0 if
> MR0 matches */
>
> From the PDF file , Register T0TCR bit 0 serve as Flag.
>
> I am right or completly lost ? > thanks in advance
>
> Yves
You clearly did reset the TIMER0 and TIMER1 counters by writing 0x02
into the T0TCR and T1TCR respectively. However, keep in mind that a
timer counter will be held in the reset state as long as bit 1 in
the TCR register is 1 (see the description of the Timer Control
Register in the User Manual).
What seems to be missing in your code is a releasing step for both
of the timers, i.e. writing 0x01 into the T0TCR and T1TCR registers.
This step should be performed after you have completely configured
both of the timers.
Having T0MCR=0x04 will only stop the TIMER0 counter, but there will
be no interrupt flag set. In order to have TIMER0 counter stopped
and Match 0 interrupt flag set, write T0MCR=0x05 (see the match
Control Register description, bits 0 & 2).
Once your TIMER0 counter reaches 200, bit MR0 in the TIMER0
Interrupt Register will be set.
Here is a code that configures TIMER0 to count 200 falling edges on
selected CAP0.0:
//TIMER0 setup
T0TCR = 0x02; /* TIMER0 Disable; reset T0TC & T0PC */
T0PR = 0x00000000; /* Reset T0PR */
T0CTCR = 0x02; /* increment TIMER0 on CAP0.0 falling edge */
T0MR0 = 200; /* Match register = 200 */
T0MCR = 0x0005; /* On MR0 Stop T0TC & T0PC and interrupt */
T0TCR = 0x01; /* TIMER0 Enable */
while ((T0IR & 0x01) == 0x00); /* Wait for MR0 <=> 200 counts */
T0IR = 0x01; /* Clear MR0 interrupt flag */
Regards
Philips Apps Team
--- In lpc2000@lpc2..., "yvesr123" <op173039@m...> wrote:
> Hello ,
>
> I have a small soft running on the LPC2138 using CAP0.0 input &
> timer0 -1.
> I'm using Timer1 as a free running Timer (Pclk = Timer1) 1:1
> Clock on CAP0.0 input clock Timer0.
> Match Register (MR0) is set to 200.
> No need for interrupt.
>
> When Timer0 match MR0 , I stop Timer1 then read it.
> Purpose :
> Setting of UART on different external clock.
>
> Test :
>
> T0TCR = 0x02;
> /* Timer Disable & Reset
> */
> T1TCR = 0x02;
> T0PC = 0x00;
> /* Prescale Counter reg Divide by 1
> */
> T1PC = 0x00;
> T0CTCR = b00000010
> /* Timer0 on falling edge, CAP0.0
> */
> T1CTCR = b00000000
> /* Timer1 on Pclk
> */
> MR0 = SX;
> /* Match register = 200
> */
> T0MCR = 0x0004;
> /* Stop on MR0: the TC and PC will be stopped */
> while (!TCR0)
> /* and TCR[0] will be set to 0 if
> MR0 matches */
>
> From the PDF file , Register T0TCR bit 0 serve as Flag.
>
> I am right or completly lost ? > thanks in advance
>
> Yves
