Hi, Does anybody has experience using the msp430F149 as a datalogger, using a sequential flash segments erase and write method within a reserved 16kb flash section (0xB000-0xF000). My concern is the broad-range flash write/erase cycle specification: nominal 100k, but minimal 10k. How realiable is the nominal 100k cycle parameter for field operation, i.e., how many devices are to be expected to start disfunction after 10k write/erase cycles? Thanks, Nico
flash write/erase cycles
Started by ●May 5, 2005
Reply by ●May 5, 20052005-05-05
I would design for the minimum of 10k cycles. However, if it is a very cost sensitive project there are some things that can be done. Most of these involve writing to flash less often. There are risks that you need to keep in mind though. It also depends what you need to log and how often things happen. Dan M -----Original Message----- From: msp430@msp4... [mailto:msp430@msp4...] On Behalf Of njmarends Sent: Thursday, May 05, 2005 4:55 AM To: msp430@msp4... Subject: [msp430] flash write/erase cycles Hi, Does anybody has experience using the msp430F149 as a datalogger, using a sequential flash segments erase and write method within a reserved 16kb flash section (0xB000-0xF000). My concern is the broad-range flash write/erase cycle specification: nominal 100k, but minimal 10k. How realiable is the nominal 100k cycle parameter for field operation, i.e., how many devices are to be expected to start disfunction after 10k write/erase cycles? Thanks, Nico . Yahoo! Groups Links
Reply by ●May 5, 20052005-05-05
I keep my supply voltage above 3V0 when writing flash. I keep Fclk
within the publsihed spec (actually about 400kHz normally). I use word
write. I execute from flash, ie no block write. I implement a mini flash
file system when using just a limited amount of memory as a data store,
typically I allocate 1 bit per word, or 1 segment, and store addresses
of faulty words. I verify each write, and retry the write up to 3 times
with a delay in between each attempt. In my experience, and I have
tested this very extensively, I would personally consider the 100k limit
to be conservative within the bondaries I described. using the failed
word table method to log an absolute failure, and a second table to log
those addresses that needed a 'second hit' over more than 100k write
cycles the incidence of re-write attempts was less than 64 total, and
there was 1 absolute failure which I attributed to some other factor at
the time, as it later 'recovered'
Al
njmarends wrote:
>Hi,
>
>Does anybody has experience using the msp430F149 as a datalogger, using
>a sequential flash segments erase and write method within a reserved
>16kb flash section (0xB000-0xF000). My concern is the broad-range flash
>write/erase cycle specification: nominal 100k, but minimal 10k. How
>realiable is the nominal 100k cycle parameter for field operation,
>i.e., how many devices are to be expected to start disfunction after
>10k write/erase cycles?
>
>Thanks,
>Nico
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>Yahoo! Groups Links
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Reply by ●May 5, 20052005-05-05
You can increase flash endurance (probably) by:
- operating at lower temperatures (below 50degC)
- use verify after write, and mark/skip defective cells
(I guess most cells survive 100k, but only a few just 10k).
- write seldom (use RAM cache and write on power fail, if possible)
Matthias
On Thu, May 05, 2005 at 09:55:04AM -0000, njmarends
wrote:
> Hi,
>
> Does anybody has experience using the msp430F149 as a datalogger, using
> a sequential flash segments erase and write method within a reserved
> 16kb flash section (0xB000-0xF000). My concern is the broad-range flash
> write/erase cycle specification: nominal 100k, but minimal 10k. How
> realiable is the nominal 100k cycle parameter for field operation,
> i.e., how many devices are to be expected to start disfunction after
> 10k write/erase cycles?
>
> Thanks,
> Nico
>
>
>
>
>
>
> .
>
>
> Yahoo! Groups Links
>
>
>
>
>
>
Matthias
Reply by ●May 5, 20052005-05-05
> Does anybody has experience using the msp430F149 as a datalogger, using > a sequential flash segments erase and write method within a reserved > 16kb flash section (0xB000-0xF000). My concern is the broad-range flash > write/erase cycle specification: nominal 100k, but minimal 10k. How > realiable is the nominal 100k cycle parameter for field operation, > i.e., how many devices are to be expected to start disfunction after > 10k write/erase cycles? My tests on a variety of Flash devices show that the write time stays reasonably constant but the erase time gets longer. On average, above the quoted cycle limit, the erase time pushes the erase/write cycle time above the spec'ed time. The erase time increases exponentially. NOR flash was shown not to have any bit errors when tested to 3 to 10 times the quote cycle time (100k in the most part). NAND flash did show a slight increase in bit failure, but then it has bit failure as part of normal operations. Tests done 2 years ago with 32MByte to 512MByte devices I can't tell you how it was done, nor for whom, why or what devices. I doubt the MSP flash is any different from stand alone flash devices as it is mostly a facet of the technologies. Veronica -------------------------------- mail2web - Check your email from the web at http://mail2web.com/ .