That's one for you compiler guys. If I were to write in C I would 
construct my code to force this translation if the compiler didn't do it 
anyway. thhis is where compilers can get VERY complex though (Hi Alex 
;?} )There are potentially so many of these optimisations that it would 
be difficult for any compiler to 'know' them all.

Al

Preston Gurd wrote:

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>>... If 
>>you're trying to divide a 32 bit value by 65536, in the second
case,  it 
>>would be quicker to simply move the MSW into the LSW, in the first case 
>>you move MSW to LSW, byte swap using SWPB, then and the result with 
>>0x00FFH. Of course SWPB isn't C, but it's a damned sight
quicker than a 
>>chain of shifts.
>>
>>Al
>>    
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>I would hope that most aq430 C compilers emit exactly the code you suggest
>for a long unsigned right shift by 24! The AQ430 C compiler does, anyway.
>
>Preston Gurd
>(the AQ430 C compiler guy)
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In asm this is even smaller/faster:_

       swpb   R15
       MOV.B   r15,r14  OR and.b  #-1,r15

Since asm doesn't understand 32 bit values there is no need to 
explicitly clear the MSW, your code simply works on the MSW, ignoring 
the LSW for this instant, however the question was about C. In C your 
compiler could, of course declare a union and do the same, building the 
value from a 32 bit data type, then calculating using only the upper 16 
bit data type, but that would be expecting too much.

Al

Paul Curtis wrote:

>All, 
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>>>... If
>>>you're trying to divide a 32 bit value by 65536, in the 
>>>      
>>>
>>second case,  
>>    
>>
>>>it would be quicker to simply move the MSW into the LSW, in 
>>>      
>>>
>>the first 
>>    
>>
>>>case you move MSW to LSW, byte swap using SWPB, then and the result 
>>>with 0x00FFH. Of course SWPB isn't C, but it's a damned 
>>>      
>>>
>>sight quicker 
>>    
>>
>>>than a chain of shifts.
>>>
>>>Al
>>>      
>>>
>>I would hope that most aq430 C compilers emit exactly the 
>>code you suggest for a long unsigned right shift by 24! The 
>>AQ430 C compiler does, anyway.
>>    
>>
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>No, that's too slow by two words:
>
>  mov.w r15, r14  ; shift by 16
>  mov.w #0, r15   ; clear vacated bits
>  swpb  r14       ; shift by 8
>  and.w #255, r14 ; clear vacated bits
>
>This is 5 words.  Ok, can make it a little better:
>
>  mov.w r15, r14  ; shift by 16
>  mov.w #0, r15   ; clear vacated bits
>  swpb  r14       ; shift by 8
>  and.b #-1, r14  ; clear vacated bits
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>Four words.  Still not good enough!
>
>  swpb  r15
>  mov.b r15, r14
>  mov.w #0, r15
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>You gotta know your processor...  Of course, CrossWorks generates the
>last and even EW430 catches it.  :-)
>
>--
>Paul Curtis, Rowley Associates Ltd  http://www.rowley.co.uk
>CrossWorks for MSP430, ARM, AVR and now MAXQ processors
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