Have somebody implemented Timer_A UART with parity bit verification or could tell me a tip to do it?
I am using MSP430F123 and I need to use two serial interfaces, one is SPI (using USART I/O) and other is the software implemented Timer_A UART. I have to read serial data that is provided with odd parity bit, so the Texas example code does not tell how to implement parity bit check. The listing code of example follows below. I will be very glad if somebody could help me!

Thanks,

Ederson

//---------------------------------------------------------
#define RXD 0x04 // RXD on P2.2
#define TXD 0x02 // TXD on P1.1
// Conditions for 9600 Baud HW/SW UART, ACLK = 3.579545MHz
#define Bitime_5 0x0BA // ~ 0.5 bit length
#define Bitime 0x175 // 104 us ~ 9596 baud
unsigned int RXTXData;
unsigned char BitCnt;
void TX_Byte (void);
void RX_Ready (void);
// M.Buccini
// Texas Instruments, Inc
// March 2002
//******************************************************************************
#include
void main (void)
{
unsigned int i;
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
BCSCTL1 |= XTS; // ACLK = LFXT1 = HF XTAL

do
{
IFG1 &= ~OFIFG; // Clear OSCFault flag
for (i = 0xFF; i > 0; i--); // Time for flag to set
}
while ( IFG1 & OFIFG ); // OSCFault flag still set?
BCSCTL2 |= SELM1+SELM0; // MCLK = LFXT1 (safe)
CCTL0 = OUT; // TXD Idle as Mark
TACTL = TASSEL0+MC1; // ACLK, continous mode
P1SEL = TXD; // P1.1/TA0 for TXD function
P1DIR = TXD; // TXD output on P1
P2SEL = RXD; // P2.2/TA0 as RXD input
// Mainloop
for (;;)
{
RX_Ready(); // UART ready to RX one Byte
_BIS_SR(CPUOFF+GIE); // Enter LPM0 Until character RXed
TX_Byte(); // TX Back RXed Byte Received
}
}

// Function Transmits Character from RXTXData Buffer
void TX_Byte (void)
{
BitCnt = 0xA; // Load Bit counter, 8data + ST/SP
CCR0 = TAR; // Current state of TA counter
CCR0 += Bitime; // Some time till first bit
RXTXData |= 0x100; // Add mark stop bit to RXTXData
RXTXData = RXTXData << 1; // Add space start bit
CCTL0 = OUTMOD0+CCIE; // TXD = mark = idle
while ( CCTL0 & CCIE ); // Wait for TX completion
}

// Function Readies UART to Receive Character into RXTXData Buffer
void RX_Ready (void)
{
BitCnt = 0x8; // Load Bit counter
CCTL0 = SCS+CCIS0+OUTMOD0+CM1+CAP+CCIE; // Sync, Neg Edge, Capture
}

// Timer A0 interrupt service routine
#pragma vector = TIMERA0_VECTOR
__interrupt void Timer_A (void)
{
CCR0 += Bitime; // Add Offset to CCR0
// RX
if (CCTL0 & CCIS0) // RX on CCI0B?
{
if( CCTL0 & CAP ) // Capture mode = start bit edge
{
CCTL0 &= ~ CAP; // Switch from capture to compare mode
CCR0 += Bitime_5;
}
else
{
RXTXData = RXTXData >> 1;
if (CCTL0 & SCCI) // Get bit waiting in receive latch
RXTXData |= 0x80;
BitCnt --; // All bits RXed?
if ( BitCnt == 0)
//>>>>>>>>>> Decode of Received Byte Here <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
{
CCTL0 &= ~ CCIE; // All bits RXed, disable interrupt
_BIC_SR_IRQ(CPUOFF); // Clear LPM0 bits from 0(SR)
}
//>>>>>>>>>> Decode of Received Byte Here <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
}
}
// TX
else
{
if ( BitCnt == 0)
CCTL0 &= ~ CCIE; // All bits TXed, disable interrupt
else
{
CCTL0 |= OUTMOD2; // TX Space
if (RXTXData & 0x01)
CCTL0 &= ~ OUTMOD2; // TX Mark
RXTXData = RXTXData >> 1;
BitCnt --;
}
}
}

---------------------------------
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Why do you not use the two hardware USART in UART mode and implement SPI in
software? This sounds very much easy to me.
:)
-Paulo.

> -----Mensagem original-----
> De: m... [mailto:m...] Em nome de
> Ederson Cichaczewski
> Enviada em: quarta-feira, 9 de agosto de 2006 14:58
> Para: MSP430 Group
> Assunto: [msp430] Timer UART with parity
>
> Have somebody implemented Timer_A UART with parity bit verification or
> could tell me a tip to do it?
> I am using MSP430F123 and I need to use two serial interfaces, one is
> SPI (using USART I/O) and other is the software implemented Timer_A UART.
> I have to read serial data that is provided with odd parity bit, so the
> Texas example code does not tell how to implement parity bit check. The
> listing code of example follows below. I will be very glad if somebody
> could help me!
>
> Thanks,
>
> Ederson
>
> //----------------------------------
> -----------------------
> #define RXD 0x04 // RXD on P2.2
> #define TXD 0x02 // TXD on P1.1
> // Conditions for 9600 Baud HW/SW UART, ACLK = 3.579545MHz
> #define Bitime_5 0x0BA // ~ 0.5 bit length
> #define Bitime 0x175 // 104 us ~ 9596 baud
> unsigned int RXTXData;
> unsigned char BitCnt;
> void TX_Byte (void);
> void RX_Ready (void);
> // M.Buccini
> // Texas Instruments, Inc
> // March 2002
> //************************************************************************
> ******
> #include
> void main (void)
> {
> unsigned int i;
> WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
> BCSCTL1 |= XTS; // ACLK = LFXT1 = HF XTAL
>
> do
> {
> IFG1 &= ~OFIFG; // Clear OSCFault flag
> for (i = 0xFF; i > 0; i--); // Time for flag to set
> }
> while ( IFG1 & OFIFG ); // OSCFault flag still set?
> BCSCTL2 |= SELM1+SELM0; // MCLK = LFXT1 (safe)
> CCTL0 = OUT; // TXD Idle as Mark
> TACTL = TASSEL0+MC1; // ACLK, continous mode
> P1SEL = TXD; // P1.1/TA0 for TXD function
> P1DIR = TXD; // TXD output on P1
> P2SEL = RXD; // P2.2/TA0 as RXD input
> // Mainloop
> for (;;)
> {
> RX_Ready(); // UART ready to RX one Byte
> _BIS_SR(CPUOFF+GIE); // Enter LPM0 Until character RXed
> TX_Byte(); // TX Back RXed Byte Received
> }
> }
>
> // Function Transmits Character from RXTXData Buffer
> void TX_Byte (void)
> {
> BitCnt = 0xA; // Load Bit counter, 8data + ST/SP
> CCR0 = TAR; // Current state of TA counter
> CCR0 += Bitime; // Some time till first bit
> RXTXData |= 0x100; // Add mark stop bit to RXTXData
> RXTXData = RXTXData << 1; // Add space start bit
> CCTL0 = OUTMOD0+CCIE; // TXD = mark = idle
> while ( CCTL0 & CCIE ); // Wait for TX completion
> }
>
> // Function Readies UART to Receive Character into RXTXData Buffer
> void RX_Ready (void)
> {
> BitCnt = 0x8; // Load Bit counter
> CCTL0 = SCS+CCIS0+OUTMOD0+CM1+CAP+CCIE; // Sync, Neg Edge, Capture
> }
>
> // Timer A0 interrupt service routine
> #pragma vector = TIMERA0_VECTOR
> __interrupt void Timer_A (void)
> {
> CCR0 += Bitime; // Add Offset to CCR0
> // RX
> if (CCTL0 & CCIS0) // RX on CCI0B?
> {
> if( CCTL0 & CAP ) // Capture mode = start bit edge
> {
> CCTL0 &= ~ CAP; // Switch from capture to compare
> mode
> CCR0 += Bitime_5;
> }
> else
> {
> RXTXData = RXTXData >> 1;
> if (CCTL0 & SCCI) // Get bit waiting in receive
> latch
> RXTXData |= 0x80;
> BitCnt --; // All bits RXed?
> if ( BitCnt == 0)
> //>>>>>>>>>> Decode of Received Byte Here
> <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
> {
> CCTL0 &= ~ CCIE; // All bits RXed, disable
> interrupt
> _BIC_SR_IRQ(CPUOFF); // Clear LPM0 bits from 0(SR)
> }
> //>>>>>>>>>> Decode of Received Byte Here
> <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
> }
> }
> // TX
> else
> {
> if ( BitCnt == 0)
> CCTL0 &= ~ CCIE; // All bits TXed, disable
> interrupt
> else
> {
> CCTL0 |= OUTMOD2; // TX Space
> if (RXTXData & 0x01)
> CCTL0 &= ~ OUTMOD2; // TX Mark
> RXTXData = RXTXData >> 1;
> BitCnt --;
> }
> }
> }
>
>
>
> ---------------------------------
> Vocquer respostas para suas perguntas? Ou vocsabe muito e quer
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>
>
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Hi,

> Have somebody implemented Timer_A UART with parity bit verification or
> could tell me a tip to do it?

For your SW UART, you just need to calculate parity.
The parity check tells you how many bits are "1" and how many "0".
You don't need to count the bits in a byte, you just need to know if the bits
that are "1" are an odd or even number.

The simplest way is to XOR all the bits together, so this is the fastest way :

1. XOR upper and lower nibble (D7-D4 XOR D3-D0)
2. XOR upper and lower 2 bits in the result nibble (D3-D2 XOR D1-D0)
3. XOR the last 2 bits (D1 XOR D0)

So in code you do :

parity = parity ^ (parity>>4); // XOR upper and lower 4 bits
parity = parity ^ (parity>>2); // XOR upper and lower 2 bits in low nibble
parity = parity ^ (parity>>1); // XOR upper and lower bit in lowest 2 bits

"parity" is now stored in BIT0...

With SW shifting of bits, don't forget that the parity bit is an EXTRA bit.
So if you have 8 data bits, you will be shifting 8 + 1 = 9 bits.
This will make for 11 bits if you account for start and stop bit to send 8 bits data + parity.

HTH
-- Kris Start a New Thread

Thank you very much Kris!

Best regards,

Ederson

Microbit escreveu:
Hi,

> Have somebody implemented Timer_A UART with parity bit verification or
> could tell me a tip to do it?

For your SW UART, you just need to calculate parity.
The parity check tells you how many bits are "1" and how many "0".
You don't need to count the bits in a byte, you just need to know if the bits
that are "1" are an odd or even number.

The simplest way is to XOR all the bits together, so this is the fastest way :

1. XOR upper and lower nibble (D7-D4 XOR D3-D0)
2. XOR upper and lower 2 bits in the result nibble (D3-D2 XOR D1-D0)
3. XOR the last 2 bits (D1 XOR D0)

So in code you do :

parity = parity ^ (parity>>4); // XOR upper and lower 4 bits
parity = parity ^ (parity>>2); // XOR upper and lower 2 bits in low nibble
parity = parity ^ (parity>>1); // XOR upper and lower bit in lowest 2 bits

"parity" is now stored in BIT0...

With SW shifting of bits, don't forget that the parity bit is an EXTRA bit.
So if you have 8 data bits, you will be shifting 8 + 1 = 9 bits.
This will make for 11 bits if you account for start and stop bit to send 8 bits data + parity.

HTH
-- Kris




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