Dear members !
I m using the MSP430F149 microcontroller. I am using the USART1 in
UART mode. I am now testing its recieve function on the TI MSP-
FET430P140 FET tool. SMCLK, as DCO/8 is used as the input clock,
which is 92421 Hz (DCO is = 92421 * 8). The problem is that whenever
a character is sent to the MSP, it enters into the ISR, but the
interrupt flag is not set. Also, the Rx Buffer does not contain the
valid data (No error bits are set). What could be the problem..?.
Baud Rate calculation..?. SMCLK frequency on the FET kit.??. Are
glitches on the URXD line are doing problms..? I am also clearing and
then setting the URXSE bit in the UTCTL1 register (if it enters in
ISR and IFG is not set), as is stated in the User's guide. Here are
my USART1 settings for UART mode:
*************************************************
BCSCTL2 |= DIVS0; // SMCLK = DCO CLK /8
BCSCTL2 |= DIVS1; // SMCLK = DCO CLK /8
ME2 |= URXE1; // USART 1 (UART mode) Rx enable
ME2 |= UTXE1; // USART 1 (UART mode) Tx enable
U1TCTL |= URXSE; // U1TCTL_bit.URXSE=1;
U1TCTL |= SSEL0; // The source clk for baud generation---SMCLK
U1TCTL |= SSEL1; // The source clk for baud generation---SMCLK
U1RCTL &= (~URXWIE); // each character recieved sets up the interpt
U1MCTL=0x55; // 2400 baud, at 92421 BRCLK
U1BR0=0x26;
U1BR1=0x00;
U1CTL &= (~MM); // Idle-line multiprocessor protocol
U1CTL &= (~SYNC); // USART in the UART mode
U1CTL &= (~LISTEN); // Tx data is not fed back
U1CTL &= (~SPB); // One stop bit
U1CTL &= (~PENA); // Parity disable
U1CTL |= CHAR; // 8-bit character
U1CTL &= (~SWRST); // Software reset,
IE2 |= URXIE1; // USART1 (UART1) Rx Interrupt enable
_BIS_SR(0x08); // Global interrupt enable
**********************
ISR is written as;
interrupt[UART1RX_VECTOR] void RS232_Rx (void)
{
if ((IFG2 & URXIFG1) == 1)
{
// Do some calculation
}
else
{
U1TCTL &= (~URXSE); // reset the interrupt, disable
if (U1RCTL & OE == 1)
OEE_flag = 1; // Over run error
else if (U1RCTL & FE == 1)
FE_flag = 1; // Framing error
U1TCTL |= URXSE; // set the start edge control bit--
}
}
**********************************
Any suggestions....
Regards,
Khubaib
problem with UART recieve..?
Started by ●June 5, 2003
Reply by ●June 5, 20032003-06-05
Khubaib:
Your Interrupt flag check has a software logic problem:
if ((IFG2 & URXIFG1) == 1)
should be coded as:
if ((IFG2 & URXIFG1) != 0)
SinceURXIFG1 = 0x10, your compare will never be true
[Rushing, Clayton C.]
-----Original Message-----
From: Khubaib [mailto:khabi_uet@khab...]
Sent: Wednesday, June 04, 2003 11:55 PM
To: msp430@msp4...
Subject: [msp430] problem with UART recieve..?
Dear members !
I m using the MSP430F149 microcontroller. I am using the USART1 in
UART mode. I am now testing its recieve function on the TI MSP-
FET430P140 FET tool. SMCLK, as DCO/8 is used as the input clock,
which is 92421 Hz (DCO is = 92421 * 8). The problem is that whenever
a character is sent to the MSP, it enters into the ISR, but the
interrupt flag is not set. Also, the Rx Buffer does not contain the
valid data (No error bits are set). What could be the problem..?.
Baud Rate calculation..?. SMCLK frequency on the FET kit.??. Are
glitches on the URXD line are doing problms..? I am also clearing and
then setting the URXSE bit in the UTCTL1 register (if it enters in
ISR and IFG is not set), as is stated in the User's guide. Here are
my USART1 settings for UART mode:
*************************************************
BCSCTL2 |= DIVS0; // SMCLK = DCO CLK /8
BCSCTL2 |= DIVS1; // SMCLK = DCO CLK /8
ME2 |= URXE1; // USART 1 (UART mode) Rx enable
ME2 |= UTXE1; // USART 1 (UART mode) Tx enable
U1TCTL |= URXSE; // U1TCTL_bit.URXSE=1;
U1TCTL |= SSEL0; // The source clk for baud generation---SMCLK
U1TCTL |= SSEL1; // The source clk for baud generation---SMCLK
U1RCTL &= (~URXWIE); // each character recieved sets up the interpt
U1MCTL=0x55; // 2400 baud, at 92421 BRCLK
U1BR0=0x26;
U1BR1=0x00;
U1CTL &= (~MM); // Idle-line multiprocessor protocol
U1CTL &= (~SYNC); // USART in the UART mode
U1CTL &= (~LISTEN); // Tx data is not fed back
U1CTL &= (~SPB); // One stop bit
U1CTL &= (~PENA); // Parity disable
U1CTL |= CHAR; // 8-bit character
U1CTL &= (~SWRST); // Software reset,
IE2 |= URXIE1; // USART1 (UART1) Rx Interrupt enable
_BIS_SR(0x08); // Global interrupt enable
**********************
ISR is written as;
interrupt[UART1RX_VECTOR] void RS232_Rx (void)
{
if ((IFG2 & URXIFG1) == 1)
{
// Do some calculation
}
else
{
U1TCTL &= (~URXSE); // reset the interrupt, disable
if (U1RCTL & OE == 1)
OEE_flag = 1; // Over run error
else if (U1RCTL & FE == 1)
FE_flag = 1; // Framing error
U1TCTL |= URXSE; // set the start edge control bit--
}
}
**********************************
Any suggestions....
Regards,
Khubaib
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Reply by ●June 6, 20032003-06-06
HI.
Or why not just ?:
if(IFG2 & URXIFG1)
much nicer me thinks :)
/jimmy
----- Original Message -----
From: Rushing, Clayton C.
To: 'msp430@'msp...'
Sent: Thursday, June 05, 2003 6:36 PM
Subject: RE: [msp430] problem with UART recieve..?
Khubaib:
Your Interrupt flag check has a software logic problem:
if ((IFG2 & URXIFG1) == 1)
should be coded as:
if ((IFG2 & URXIFG1) != 0)
SinceURXIFG1 = 0x10, your compare will never be true
[Rushing, Clayton C.]
-----Original Message-----
X-UIDL: 105487970513 From: Khubaib [mailto:khabi_uet@khab...]
Sent: Wednesday, June 04, 2003 11:55 PM
To: msp430@msp4...
Subject: [msp430] problem with UART recieve..?
Dear members !
I m using the MSP430F149 microcontroller. I am using the USART1 in
UART mode. I am now testing its recieve function on the TI MSP-
FET430P140 FET tool. SMCLK, as DCO/8 is used as the input clock,
which is 92421 Hz (DCO is = 92421 * 8). The problem is that whenever
a character is sent to the MSP, it enters into the ISR, but the
interrupt flag is not set. Also, the Rx Buffer does not contain the
valid data (No error bits are set). What could be the problem..?.
Baud Rate calculation..?. SMCLK frequency on the FET kit.??. Are
glitches on the URXD line are doing problms..? I am also clearing and
then setting the URXSE bit in the UTCTL1 register (if it enters in
ISR and IFG is not set), as is stated in the User's guide. Here are
my USART1 settings for UART mode:
*************************************************
BCSCTL2 |= DIVS0; // SMCLK = DCO CLK /8
BCSCTL2 |= DIVS1; // SMCLK = DCO CLK /8
ME2 |= URXE1; // USART 1 (UART mode) Rx enable
ME2 |= UTXE1; // USART 1 (UART mode) Tx enable
U1TCTL |= URXSE; // U1TCTL_bit.URXSE=1;
U1TCTL |= SSEL0; // The source clk for baud generation---SMCLK
U1TCTL |= SSEL1; // The source clk for baud generation---SMCLK
U1RCTL &= (~URXWIE); // each character recieved sets up the interpt
U1MCTL=0x55; // 2400 baud, at 92421 BRCLK
U1BR0=0x26;
U1BR1=0x00;
U1CTL &= (~MM); // Idle-line multiprocessor protocol
U1CTL &= (~SYNC); // USART in the UART mode
U1CTL &= (~LISTEN); // Tx data is not fed back
U1CTL &= (~SPB); // One stop bit
U1CTL &= (~PENA); // Parity disable
U1CTL |= CHAR; // 8-bit character
U1CTL &= (~SWRST); // Software reset,
IE2 |= URXIE1; // USART1 (UART1) Rx Interrupt enable
_BIS_SR(0x08); // Global interrupt enable
**********************
ISR is written as;
interrupt[UART1RX_VECTOR] void RS232_Rx (void)
{
if ((IFG2 & URXIFG1) == 1)
{
// Do some calculation
}
else
{
U1TCTL &= (~URXSE); // reset the interrupt, disable
if (U1RCTL & OE == 1)
OEE_flag = 1; // Over run error
else if (U1RCTL & FE == 1)
FE_flag = 1; // Framing error
U1TCTL |= URXSE; // set the start edge control bit--
}
}
**********************************
Any suggestions....
Regards,
Khubaib
Yahoo! Groups Sponsor
<http://rd.yahoo.com/M%1812.3170658.4537139.1261774/D=egroupweb/S050053
78:HM/A64415/R=0/SIGt6t7kdo/*http://www.netflix.com/Default?mqso`164
784&partid170658>
<http://us.adserver.yahoo.com/l?M%1812.3170658.4537139.1261774/D=egroupmai
l/S=:HM/A64415/rand4554047>
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