When I use the LPM4 mode with a msp430F417 I have no problem to
wake-up the processor but when I use the same software with a
msp430F437, the LFXT1 oscillator no longer work properly after wake-up
from LPM4. The only way to restart it properly is to power off the
processor.
More details:
The quartz connected to XIN / Xout is a 32kHz.
After LPM4, I do a PUC using the Watchdog register. I have
experimented the 4 possibilities with the internal capacitors. I also
tried with various values of external capacitors. In any case the
signal at pin ACLK (pin 62) is not correct. Sometimes the quartz
oscillates on 3rd harmonic, other times the frequency is ok but the
duty cycle is about 20% whitch is unusable for my application.
The error is systematic. The oscillator always works properly after
power up, but never works properly after LPM4 + PUC. There is no
problem after LPM3 + PUC (because the LFXT1 doesn't stop with LPM3).
Has any of you something to suggest?
LPM4 and LFXT1
Started by ●March 4, 2007
Reply by ●March 4, 20072007-03-04
Hi,
> Sometimes the quartz oscillates on 3rd harmonic, other times the frequency
> is ok but the duty cycle is about 20% whitch is unusable for my application.
A crystal shifting to Third overtone (if in a classic Pierce Osc like on MCUs)
generally is a _significant_ tell tale sign of poor quality crystal.
I would question this first. See if you can obtain specs on the crystal, or find
out what its ESR is. I would bet on the fact that this is the issue.
Cheap high volume crystals tend to be cheap by having poor ESR, I've seen this so many times !
With such low frequency crystals as 32 kHz the problem is compounded.
Try to get a crystal that you _know_ is good quality (ie. well within spec on ESR) and run the
same code with it.
If you still have the problem (which I doubt) then something's iffy in the start up sequencing
of the oscillator.
> experimented the 4 possibilities with the internal capacitors. I also
> tried with various values of external capacitors. In any case the
There's no point in that.
You will find that the flipping to 3rd overtone might stop with specific values of load caps
(actually, the phase shift cap), but then it's guaranteed that with different crystals the problem
will reappear in production.
Regardless of outcome, I would advise low ESR crystals are used, especially for DFM.
HW designers tend to be to casual about crystals and their use in MCUs (aka ignorant).
HTH
Best Regards,
Kris
-----Original Message-----
From: m... [mailto:m...] On Behalf Of cl.buchilly
Sent: Tuesday, 27 February 2007 7:03 PM
To: m...
Subject: [msp430] LPM4 and LFXT1
When I use the LPM4 mode with a msp430F417 I have no problem to
wake-up the processor but when I use the same software with a
msp430F437, the LFXT1 oscillator no longer work properly after wake-up
from LPM4. The only way to restart it properly is to power off the
processor.
More details:
The quartz connected to XIN / Xout is a 32kHz.
After LPM4, I do a PUC using the Watchdog register. I have
experimented the 4 possibilities with the internal capacitors. I also
tried with various values of external capacitors. In any case the
signal at pin ACLK (pin 62) is not correct. Sometimes the quartz
oscillates on 3rd harmonic, other times the frequency is ok but the
duty cycle is about 20% whitch is unusable for my application.
The error is systematic. The oscillator always works properly after
power up, but never works properly after LPM4 + PUC. There is no
problem after LPM3 + PUC (because the LFXT1 doesn't stop with LPM3).
Has any of you something to suggest?
Yahoo! Groups Links
> Sometimes the quartz oscillates on 3rd harmonic, other times the frequency
> is ok but the duty cycle is about 20% whitch is unusable for my application.
A crystal shifting to Third overtone (if in a classic Pierce Osc like on MCUs)
generally is a _significant_ tell tale sign of poor quality crystal.
I would question this first. See if you can obtain specs on the crystal, or find
out what its ESR is. I would bet on the fact that this is the issue.
Cheap high volume crystals tend to be cheap by having poor ESR, I've seen this so many times !
With such low frequency crystals as 32 kHz the problem is compounded.
Try to get a crystal that you _know_ is good quality (ie. well within spec on ESR) and run the
same code with it.
If you still have the problem (which I doubt) then something's iffy in the start up sequencing
of the oscillator.
> experimented the 4 possibilities with the internal capacitors. I also
> tried with various values of external capacitors. In any case the
There's no point in that.
You will find that the flipping to 3rd overtone might stop with specific values of load caps
(actually, the phase shift cap), but then it's guaranteed that with different crystals the problem
will reappear in production.
Regardless of outcome, I would advise low ESR crystals are used, especially for DFM.
HW designers tend to be to casual about crystals and their use in MCUs (aka ignorant).
HTH
Best Regards,
Kris
-----Original Message-----
From: m... [mailto:m...] On Behalf Of cl.buchilly
Sent: Tuesday, 27 February 2007 7:03 PM
To: m...
Subject: [msp430] LPM4 and LFXT1
When I use the LPM4 mode with a msp430F417 I have no problem to
wake-up the processor but when I use the same software with a
msp430F437, the LFXT1 oscillator no longer work properly after wake-up
from LPM4. The only way to restart it properly is to power off the
processor.
More details:
The quartz connected to XIN / Xout is a 32kHz.
After LPM4, I do a PUC using the Watchdog register. I have
experimented the 4 possibilities with the internal capacitors. I also
tried with various values of external capacitors. In any case the
signal at pin ACLK (pin 62) is not correct. Sometimes the quartz
oscillates on 3rd harmonic, other times the frequency is ok but the
duty cycle is about 20% whitch is unusable for my application.
The error is systematic. The oscillator always works properly after
power up, but never works properly after LPM4 + PUC. There is no
problem after LPM3 + PUC (because the LFXT1 doesn't stop with LPM3).
Has any of you something to suggest?
Yahoo! Groups Links
Reply by ●March 5, 20072007-03-05
While I agree with Microbit that you may need a better crystal, I
suggest that you also consider the following two ideas.
One idea is, before go to LPM4, change all clock module registers to
their PUC settings. After wake up from LPM4, first wait for LFXT1 to
stabilize before changing the clock module resisters to the settings
you want.
The other idea is, do not use LPM4. Use LPM3 instead. The difference
between the two modes is less than 2 uA. The LFXT1 takes hundreds of
milli-seconds to start (if it starts at all); it is hardly worth the
long wait to save 2 uA (17 mAHr per year).
--- In m..., "Microbit" wrote:
>
> Hi,
>
> > Sometimes the quartz oscillates on 3rd harmonic, other times the
frequency
> > is ok but the duty cycle is about 20% whitch is unusable for my
application.
>
> A crystal shifting to Third overtone (if in a classic Pierce Osc
like on MCUs)
> generally is a _significant_ tell tale sign of poor quality crystal.
> I would question this first. See if you can obtain specs on the
crystal, or find
> out what its ESR is. I would bet on the fact that this is the issue.
> Cheap high volume crystals tend to be cheap by having poor ESR,
I've seen this so many times !
>
> With such low frequency crystals as 32 kHz the problem is
compounded.
> Try to get a crystal that you _know_ is good quality (ie. well
within spec on ESR) and run the
> same code with it.
> If you still have the problem (which I doubt) then something's iffy
in the start up sequencing
> of the oscillator.
>
> > experimented the 4 possibilities with the internal capacitors. I
also
> > tried with various values of external capacitors. In any case the
>
> There's no point in that.
> You will find that the flipping to 3rd overtone might stop with
specific values of load caps
> (actually, the phase shift cap), but then it's guaranteed that with
different crystals the problem
> will reappear in production.
>
> Regardless of outcome, I would advise low ESR crystals are used,
especially for DFM.
> HW designers tend to be to casual about crystals and their use in
MCUs (aka ignorant).
>
> HTH
> Best Regards,
> Kris
>
> -----Original Message-----
> From: m... [mailto:m...] On
Behalf Of cl.buchilly
> Sent: Tuesday, 27 February 2007 7:03 PM
> To: m...
> Subject: [msp430] LPM4 and LFXT1
>
> When I use the LPM4 mode with a msp430F417 I have no problem to
> wake-up the processor but when I use the same software with a
> msp430F437, the LFXT1 oscillator no longer work properly after wake-
up
> from LPM4. The only way to restart it properly is to power off the
> processor.
>
> More details:
> The quartz connected to XIN / Xout is a 32kHz.
> After LPM4, I do a PUC using the Watchdog register. I have
> experimented the 4 possibilities with the internal capacitors. I
also
> tried with various values of external capacitors. In any case the
> signal at pin ACLK (pin 62) is not correct. Sometimes the quartz
> oscillates on 3rd harmonic, other times the frequency is ok but the
> duty cycle is about 20% whitch is unusable for my application.
>
> The error is systematic. The oscillator always works properly after
> power up, but never works properly after LPM4 + PUC. There is no
> problem after LPM3 + PUC (because the LFXT1 doesn't stop with LPM3).
>
> Has any of you something to suggest?
>
>
> Yahoo! Groups Links
>
suggest that you also consider the following two ideas.
One idea is, before go to LPM4, change all clock module registers to
their PUC settings. After wake up from LPM4, first wait for LFXT1 to
stabilize before changing the clock module resisters to the settings
you want.
The other idea is, do not use LPM4. Use LPM3 instead. The difference
between the two modes is less than 2 uA. The LFXT1 takes hundreds of
milli-seconds to start (if it starts at all); it is hardly worth the
long wait to save 2 uA (17 mAHr per year).
--- In m..., "Microbit" wrote:
>
> Hi,
>
> > Sometimes the quartz oscillates on 3rd harmonic, other times the
frequency
> > is ok but the duty cycle is about 20% whitch is unusable for my
application.
>
> A crystal shifting to Third overtone (if in a classic Pierce Osc
like on MCUs)
> generally is a _significant_ tell tale sign of poor quality crystal.
> I would question this first. See if you can obtain specs on the
crystal, or find
> out what its ESR is. I would bet on the fact that this is the issue.
> Cheap high volume crystals tend to be cheap by having poor ESR,
I've seen this so many times !
>
> With such low frequency crystals as 32 kHz the problem is
compounded.
> Try to get a crystal that you _know_ is good quality (ie. well
within spec on ESR) and run the
> same code with it.
> If you still have the problem (which I doubt) then something's iffy
in the start up sequencing
> of the oscillator.
>
> > experimented the 4 possibilities with the internal capacitors. I
also
> > tried with various values of external capacitors. In any case the
>
> There's no point in that.
> You will find that the flipping to 3rd overtone might stop with
specific values of load caps
> (actually, the phase shift cap), but then it's guaranteed that with
different crystals the problem
> will reappear in production.
>
> Regardless of outcome, I would advise low ESR crystals are used,
especially for DFM.
> HW designers tend to be to casual about crystals and their use in
MCUs (aka ignorant).
>
> HTH
> Best Regards,
> Kris
>
> -----Original Message-----
> From: m... [mailto:m...] On
Behalf Of cl.buchilly
> Sent: Tuesday, 27 February 2007 7:03 PM
> To: m...
> Subject: [msp430] LPM4 and LFXT1
>
> When I use the LPM4 mode with a msp430F417 I have no problem to
> wake-up the processor but when I use the same software with a
> msp430F437, the LFXT1 oscillator no longer work properly after wake-
up
> from LPM4. The only way to restart it properly is to power off the
> processor.
>
> More details:
> The quartz connected to XIN / Xout is a 32kHz.
> After LPM4, I do a PUC using the Watchdog register. I have
> experimented the 4 possibilities with the internal capacitors. I
also
> tried with various values of external capacitors. In any case the
> signal at pin ACLK (pin 62) is not correct. Sometimes the quartz
> oscillates on 3rd harmonic, other times the frequency is ok but the
> duty cycle is about 20% whitch is unusable for my application.
>
> The error is systematic. The oscillator always works properly after
> power up, but never works properly after LPM4 + PUC. There is no
> problem after LPM3 + PUC (because the LFXT1 doesn't stop with LPM3).
>
> Has any of you something to suggest?
>
>
> Yahoo! Groups Links
>
Reply by ●March 5, 20072007-03-05
This should be rephrased :)
It should read "A poor HW designer tends to ..."
Without Wax,
BB
--- Microbit wrote:
> Hi,
>
.
> HW designers tend to be to casual about crystals and
> their use in MCUs (aka ignorant).
>
> HTH
> Best Regards,
> Kris
____________________________________________________________________________________
It's here! Your new message!
Get new email alerts with the free Yahoo! Toolbar.
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It should read "A poor HW designer tends to ..."
Without Wax,
BB
--- Microbit wrote:
> Hi,
>
.
> HW designers tend to be to casual about crystals and
> their use in MCUs (aka ignorant).
>
> HTH
> Best Regards,
> Kris
____________________________________________________________________________________
It's here! Your new message!
Get new email alerts with the free Yahoo! Toolbar.
http://tools.search.yahoo.com/toolbar/features/mail/
Reply by ●March 5, 20072007-03-05
Please xcuse my ignorance but I thought that during
LPM4, _all_ oscillators are stopped and thus the WD is
nonoperational :)
One way to wakeup the processor is by NMI.
Am'I Wrong?
Without Wax,
BB
--- "cl.buchilly" wrote:
> After LPM4, I do a PUC using the Watchdog register.
____________________________________________________________________________________
Cheap talk?
Check out Yahoo! Messenger's low PC-to-Phone call rates.
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LPM4, _all_ oscillators are stopped and thus the WD is
nonoperational :)
One way to wakeup the processor is by NMI.
Am'I Wrong?
Without Wax,
BB
--- "cl.buchilly" wrote:
> After LPM4, I do a PUC using the Watchdog register.
____________________________________________________________________________________
Cheap talk?
Check out Yahoo! Messenger's low PC-to-Phone call rates.
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Reply by ●March 5, 20072007-03-05
You are correct. Only externally generated reset or interrupts (NMI,
P1IFGs, and P2IFGs) can get MSP430 out of LPM4. But I think what
cl.buchilly meant was, after waking up from LPM4, his code accesses
the Watchdog register (without proper password) to cause a PUC reset.
The puzzling part of his problem was why does the LFXT1 works after
initial power on but not after waking up from LPM4.
I have an unproven theory. At power up, the POR/PUC puts most of the
modules in inactive mode. The DCO is running at a medium low
frequency with the FLL turned off. Both the MCLK and the SMCLK are
directly driven by DCO without using the LFXT1 as a reference for the
FLL. The LFXT1 has no problem starting up under such conditions.
Before going to LPM4, some of the peripheral registers are changed
and are different from the POR/PUC settings. This is fine, but waking
up from LPM4, some of the modules have to go to active mode
immediately according to these register settings. The DCO has to FLL
with the LFXT1 as frequency reference immediately according to these
register settings. I think the LFXT1 has problem stating up under
such conditions.
Thus my suggestion is, before go to LPM4, set all peripheral
registers to the POR/PUC values. This is so that when the chip wakes
up from LPM4, it behaves the same way as starting from initial power
on.
--- In m..., bumerang boom
wrote:
>
> Please xcuse my ignorance but I thought that during
> LPM4, _all_ oscillators are stopped and thus the WD is
> nonoperational :)
> One way to wakeup the processor is by NMI.
>
> Am'I Wrong?
>
> Without Wax,
> BB
>
> --- "cl.buchilly" wrote:
>
> > After LPM4, I do a PUC using the Watchdog register.
>
>
>
______________________________________________________________________
______________
> Cheap talk?
> Check out Yahoo! Messenger's low PC-to-Phone call rates.
> http://voice.yahoo.com
>
P1IFGs, and P2IFGs) can get MSP430 out of LPM4. But I think what
cl.buchilly meant was, after waking up from LPM4, his code accesses
the Watchdog register (without proper password) to cause a PUC reset.
The puzzling part of his problem was why does the LFXT1 works after
initial power on but not after waking up from LPM4.
I have an unproven theory. At power up, the POR/PUC puts most of the
modules in inactive mode. The DCO is running at a medium low
frequency with the FLL turned off. Both the MCLK and the SMCLK are
directly driven by DCO without using the LFXT1 as a reference for the
FLL. The LFXT1 has no problem starting up under such conditions.
Before going to LPM4, some of the peripheral registers are changed
and are different from the POR/PUC settings. This is fine, but waking
up from LPM4, some of the modules have to go to active mode
immediately according to these register settings. The DCO has to FLL
with the LFXT1 as frequency reference immediately according to these
register settings. I think the LFXT1 has problem stating up under
such conditions.
Thus my suggestion is, before go to LPM4, set all peripheral
registers to the POR/PUC values. This is so that when the chip wakes
up from LPM4, it behaves the same way as starting from initial power
on.
--- In m..., bumerang boom
wrote:
>
> Please xcuse my ignorance but I thought that during
> LPM4, _all_ oscillators are stopped and thus the WD is
> nonoperational :)
> One way to wakeup the processor is by NMI.
>
> Am'I Wrong?
>
> Without Wax,
> BB
>
> --- "cl.buchilly" wrote:
>
> > After LPM4, I do a PUC using the Watchdog register.
>
>
>
______________________________________________________________________
______________
> Cheap talk?
> Check out Yahoo! Messenger's low PC-to-Phone call rates.
> http://voice.yahoo.com
>
Reply by ●March 5, 20072007-03-05
Check that the family of this msp430 uses the WDT+
providing a failsafe clocking. And that is the reason
because he thinks msp430417 the program work.
regards.
--- old_cow_yellow wrote:
> You are correct. Only externally generated reset or
> interrupts (NMI,
> P1IFGs, and P2IFGs) can get MSP430 out of LPM4. But
> I think what
> cl.buchilly meant was, after waking up from LPM4,
> his code accesses
> the Watchdog register (without proper password) to
> cause a PUC reset.
>
> The puzzling part of his problem was why does the
> LFXT1 works after
> initial power on but not after waking up from LPM4.
>
> I have an unproven theory. At power up, the POR/PUC
> puts most of the
> modules in inactive mode. The DCO is running at a
> medium low
> frequency with the FLL turned off. Both the MCLK and
> the SMCLK are
> directly driven by DCO without using the LFXT1 as a
> reference for the
> FLL. The LFXT1 has no problem starting up under such
> conditions.
>
> Before going to LPM4, some of the peripheral
> registers are changed
> and are different from the POR/PUC settings. This is
> fine, but waking
> up from LPM4, some of the modules have to go to
> active mode
> immediately according to these register settings.
> The DCO has to FLL
> with the LFXT1 as frequency reference immediately
> according to these
> register settings. I think the LFXT1 has problem
> stating up under
> such conditions.
>
> Thus my suggestion is, before go to LPM4, set all
> peripheral
> registers to the POR/PUC values. This is so that
> when the chip wakes
> up from LPM4, it behaves the same way as starting
> from initial power
> on.
>
> --- In m..., bumerang boom
>
> wrote:
> >
> > Please xcuse my ignorance but I thought that
> during
> > LPM4, _all_ oscillators are stopped and thus the
> WD is
> > nonoperational :)
> > One way to wakeup the processor is by NMI.
> >
> > Am'I Wrong?
> >
> > Without Wax,
> > BB
> >
> >
> >
> > --- "cl.buchilly" wrote:
> >
> > > After LPM4, I do a PUC using the Watchdog
> register.
> >
> >
> >
> >
> ______________________________________________________________________
> ______________
> > Cheap talk?
> > Check out Yahoo! Messenger's low PC-to-Phone call
> rates.
> > http://voice.yahoo.com
>
____________________________________________________________________________________
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providing a failsafe clocking. And that is the reason
because he thinks msp430417 the program work.
regards.
--- old_cow_yellow wrote:
> You are correct. Only externally generated reset or
> interrupts (NMI,
> P1IFGs, and P2IFGs) can get MSP430 out of LPM4. But
> I think what
> cl.buchilly meant was, after waking up from LPM4,
> his code accesses
> the Watchdog register (without proper password) to
> cause a PUC reset.
>
> The puzzling part of his problem was why does the
> LFXT1 works after
> initial power on but not after waking up from LPM4.
>
> I have an unproven theory. At power up, the POR/PUC
> puts most of the
> modules in inactive mode. The DCO is running at a
> medium low
> frequency with the FLL turned off. Both the MCLK and
> the SMCLK are
> directly driven by DCO without using the LFXT1 as a
> reference for the
> FLL. The LFXT1 has no problem starting up under such
> conditions.
>
> Before going to LPM4, some of the peripheral
> registers are changed
> and are different from the POR/PUC settings. This is
> fine, but waking
> up from LPM4, some of the modules have to go to
> active mode
> immediately according to these register settings.
> The DCO has to FLL
> with the LFXT1 as frequency reference immediately
> according to these
> register settings. I think the LFXT1 has problem
> stating up under
> such conditions.
>
> Thus my suggestion is, before go to LPM4, set all
> peripheral
> registers to the POR/PUC values. This is so that
> when the chip wakes
> up from LPM4, it behaves the same way as starting
> from initial power
> on.
>
> --- In m..., bumerang boom
>
> wrote:
> >
> > Please xcuse my ignorance but I thought that
> during
> > LPM4, _all_ oscillators are stopped and thus the
> WD is
> > nonoperational :)
> > One way to wakeup the processor is by NMI.
> >
> > Am'I Wrong?
> >
> > Without Wax,
> > BB
> >
> >
> >
> > --- "cl.buchilly" wrote:
> >
> > > After LPM4, I do a PUC using the Watchdog
> register.
> >
> >
> >
> >
> ______________________________________________________________________
> ______________
> > Cheap talk?
> > Check out Yahoo! Messenger's low PC-to-Phone call
> rates.
> > http://voice.yahoo.com
>
____________________________________________________________________________________
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Reply by ●March 6, 20072007-03-06
Thanks. F417 and F437 do not have WDT+.
--- In m..., Rodolfo Gonzalez wrote:
>
> Check that the family of this msp430 uses the WDT+
> providing a failsafe clocking. And that is the reason
> because he thinks msp430417 the program work.
>
> regards.
> --- old_cow_yellow wrote:
>
> > You are correct. Only externally generated reset or
> > interrupts (NMI,
> > P1IFGs, and P2IFGs) can get MSP430 out of LPM4. But
> > I think what
> > cl.buchilly meant was, after waking up from LPM4,
> > his code accesses
> > the Watchdog register (without proper password) to
> > cause a PUC reset.
> >
> > The puzzling part of his problem was why does the
> > LFXT1 works after
> > initial power on but not after waking up from LPM4.
> >
> > I have an unproven theory. At power up, the POR/PUC
> > puts most of the
> > modules in inactive mode. The DCO is running at a
> > medium low
> > frequency with the FLL turned off. Both the MCLK and
> > the SMCLK are
> > directly driven by DCO without using the LFXT1 as a
> > reference for the
> > FLL. The LFXT1 has no problem starting up under such
> > conditions.
> >
> > Before going to LPM4, some of the peripheral
> > registers are changed
> > and are different from the POR/PUC settings. This is
> > fine, but waking
> > up from LPM4, some of the modules have to go to
> > active mode
> > immediately according to these register settings.
> > The DCO has to FLL
> > with the LFXT1 as frequency reference immediately
> > according to these
> > register settings. I think the LFXT1 has problem
> > stating up under
> > such conditions.
> >
> > Thus my suggestion is, before go to LPM4, set all
> > peripheral
> > registers to the POR/PUC values. This is so that
> > when the chip wakes
> > up from LPM4, it behaves the same way as starting
> > from initial power
> > on.
> >
> > --- In m..., bumerang boom
> >
> > wrote:
> > >
> > > Please xcuse my ignorance but I thought that
> > during
> > > LPM4, _all_ oscillators are stopped and thus the
> > WD is
> > > nonoperational :)
> > > One way to wakeup the processor is by NMI.
> > >
> > > Am'I Wrong?
> > >
> > > Without Wax,
> > > BB
> > >
> > >
> > >
> > > --- "cl.buchilly" wrote:
> > >
> > > > After LPM4, I do a PUC using the Watchdog
> > register.
> > >
> > >
> > >
> > >
> > >
> ______________________________________________________________________
> > ______________
> > > Cheap talk?
> > > Check out Yahoo! Messenger's low PC-to-Phone call
> > rates.
> > > http://voice.yahoo.com
> > >
> >
> >
> >
>
______________________________________________________________________
______________
> Sucker-punch spam with award-winning protection.
> Try the free Yahoo! Mail Beta.
> http://advision.webevents.yahoo.com/mailbeta/features_spam.html
>
--- In m..., Rodolfo Gonzalez wrote:
>
> Check that the family of this msp430 uses the WDT+
> providing a failsafe clocking. And that is the reason
> because he thinks msp430417 the program work.
>
> regards.
> --- old_cow_yellow wrote:
>
> > You are correct. Only externally generated reset or
> > interrupts (NMI,
> > P1IFGs, and P2IFGs) can get MSP430 out of LPM4. But
> > I think what
> > cl.buchilly meant was, after waking up from LPM4,
> > his code accesses
> > the Watchdog register (without proper password) to
> > cause a PUC reset.
> >
> > The puzzling part of his problem was why does the
> > LFXT1 works after
> > initial power on but not after waking up from LPM4.
> >
> > I have an unproven theory. At power up, the POR/PUC
> > puts most of the
> > modules in inactive mode. The DCO is running at a
> > medium low
> > frequency with the FLL turned off. Both the MCLK and
> > the SMCLK are
> > directly driven by DCO without using the LFXT1 as a
> > reference for the
> > FLL. The LFXT1 has no problem starting up under such
> > conditions.
> >
> > Before going to LPM4, some of the peripheral
> > registers are changed
> > and are different from the POR/PUC settings. This is
> > fine, but waking
> > up from LPM4, some of the modules have to go to
> > active mode
> > immediately according to these register settings.
> > The DCO has to FLL
> > with the LFXT1 as frequency reference immediately
> > according to these
> > register settings. I think the LFXT1 has problem
> > stating up under
> > such conditions.
> >
> > Thus my suggestion is, before go to LPM4, set all
> > peripheral
> > registers to the POR/PUC values. This is so that
> > when the chip wakes
> > up from LPM4, it behaves the same way as starting
> > from initial power
> > on.
> >
> > --- In m..., bumerang boom
> >
> > wrote:
> > >
> > > Please xcuse my ignorance but I thought that
> > during
> > > LPM4, _all_ oscillators are stopped and thus the
> > WD is
> > > nonoperational :)
> > > One way to wakeup the processor is by NMI.
> > >
> > > Am'I Wrong?
> > >
> > > Without Wax,
> > > BB
> > >
> > >
> > >
> > > --- "cl.buchilly" wrote:
> > >
> > > > After LPM4, I do a PUC using the Watchdog
> > register.
> > >
> > >
> > >
> > >
> > >
> ______________________________________________________________________
> > ______________
> > > Cheap talk?
> > > Check out Yahoo! Messenger's low PC-to-Phone call
> > rates.
> > > http://voice.yahoo.com
> > >
> >
> >
> >
>
______________________________________________________________________
______________
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Reply by ●March 7, 20072007-03-07
Damn you have right, how he could made thats work? :|
--- old_cow_yellow wrote:
> Thanks. F417 and F437 do not have WDT+.
>
> --- In m..., Rodolfo Gonzalez
> wrote:
> >
> > Check that the family of this msp430 uses the WDT+
> > providing a failsafe clocking. And that is the
> reason
> > because he thinks msp430417 the program work.
> >
> > regards.
> >
> >
> > --- old_cow_yellow wrote:
> >
> > > You are correct. Only externally generated reset
> or
> > > interrupts (NMI,
> > > P1IFGs, and P2IFGs) can get MSP430 out of LPM4.
> But
> > > I think what
> > > cl.buchilly meant was, after waking up from
> LPM4,
> > > his code accesses
> > > the Watchdog register (without proper password)
> to
> > > cause a PUC reset.
> > >
> > > The puzzling part of his problem was why does
> the
> > > LFXT1 works after
> > > initial power on but not after waking up from
> LPM4.
> > >
> > > I have an unproven theory. At power up, the
> POR/PUC
> > > puts most of the
> > > modules in inactive mode. The DCO is running at
> a
> > > medium low
> > > frequency with the FLL turned off. Both the MCLK
> and
> > > the SMCLK are
> > > directly driven by DCO without using the LFXT1
> as a
> > > reference for the
> > > FLL. The LFXT1 has no problem starting up under
> such
> > > conditions.
> > >
> > > Before going to LPM4, some of the peripheral
> > > registers are changed
> > > and are different from the POR/PUC settings.
> This is
> > > fine, but waking
> > > up from LPM4, some of the modules have to go to
> > > active mode
> > > immediately according to these register
> settings.
> > > The DCO has to FLL
> > > with the LFXT1 as frequency reference
> immediately
> > > according to these
> > > register settings. I think the LFXT1 has problem
> > > stating up under
> > > such conditions.
> > >
> > > Thus my suggestion is, before go to LPM4, set
> all
> > > peripheral
> > > registers to the POR/PUC values. This is so that
> > > when the chip wakes
> > > up from LPM4, it behaves the same way as
> starting
> > > from initial power
> > > on.
> > >
> > > --- In m..., bumerang boom
> > >
> > > wrote:
> > > >
> > > > Please xcuse my ignorance but I thought that
> > > during
> > > > LPM4, _all_ oscillators are stopped and thus
> the
> > > WD is
> > > > nonoperational :)
> > > > One way to wakeup the processor is by NMI.
> > > >
> > > > Am'I Wrong?
> > > >
> > > > Without Wax,
> > > > BB
> > > >
> > > >
> > > >
> > > > --- "cl.buchilly" wrote:
> > > >
> > > > > After LPM4, I do a PUC using the Watchdog
> > > register.
> > > >
> > > >
> > > >
> > > >
> > > >
> > >
> ______________________________________________________________________
> > > ______________
> > > > Cheap talk?
> > > > Check out Yahoo! Messenger's low PC-to-Phone
> call
> > > rates.
> > > > http://voice.yahoo.com
> > > >
> > >
> > >
> > >
> >
> >
> >
> >
> ______________________________________________________________________
> ______________
> > Sucker-punch spam with award-winning protection.
> > Try the free Yahoo! Mail Beta.
> http://advision.webevents.yahoo.com/mailbeta/features_spam.html
>
____________________________________________________________________________________
We won't tell. Get more on shows you hate to love
(and love to hate): Yahoo! TV's Guilty Pleasures list.
http://tv.yahoo.com/collections/265
--- old_cow_yellow wrote:
> Thanks. F417 and F437 do not have WDT+.
>
> --- In m..., Rodolfo Gonzalez
> wrote:
> >
> > Check that the family of this msp430 uses the WDT+
> > providing a failsafe clocking. And that is the
> reason
> > because he thinks msp430417 the program work.
> >
> > regards.
> >
> >
> > --- old_cow_yellow wrote:
> >
> > > You are correct. Only externally generated reset
> or
> > > interrupts (NMI,
> > > P1IFGs, and P2IFGs) can get MSP430 out of LPM4.
> But
> > > I think what
> > > cl.buchilly meant was, after waking up from
> LPM4,
> > > his code accesses
> > > the Watchdog register (without proper password)
> to
> > > cause a PUC reset.
> > >
> > > The puzzling part of his problem was why does
> the
> > > LFXT1 works after
> > > initial power on but not after waking up from
> LPM4.
> > >
> > > I have an unproven theory. At power up, the
> POR/PUC
> > > puts most of the
> > > modules in inactive mode. The DCO is running at
> a
> > > medium low
> > > frequency with the FLL turned off. Both the MCLK
> and
> > > the SMCLK are
> > > directly driven by DCO without using the LFXT1
> as a
> > > reference for the
> > > FLL. The LFXT1 has no problem starting up under
> such
> > > conditions.
> > >
> > > Before going to LPM4, some of the peripheral
> > > registers are changed
> > > and are different from the POR/PUC settings.
> This is
> > > fine, but waking
> > > up from LPM4, some of the modules have to go to
> > > active mode
> > > immediately according to these register
> settings.
> > > The DCO has to FLL
> > > with the LFXT1 as frequency reference
> immediately
> > > according to these
> > > register settings. I think the LFXT1 has problem
> > > stating up under
> > > such conditions.
> > >
> > > Thus my suggestion is, before go to LPM4, set
> all
> > > peripheral
> > > registers to the POR/PUC values. This is so that
> > > when the chip wakes
> > > up from LPM4, it behaves the same way as
> starting
> > > from initial power
> > > on.
> > >
> > > --- In m..., bumerang boom
> > >
> > > wrote:
> > > >
> > > > Please xcuse my ignorance but I thought that
> > > during
> > > > LPM4, _all_ oscillators are stopped and thus
> the
> > > WD is
> > > > nonoperational :)
> > > > One way to wakeup the processor is by NMI.
> > > >
> > > > Am'I Wrong?
> > > >
> > > > Without Wax,
> > > > BB
> > > >
> > > >
> > > >
> > > > --- "cl.buchilly" wrote:
> > > >
> > > > > After LPM4, I do a PUC using the Watchdog
> > > register.
> > > >
> > > >
> > > >
> > > >
> > > >
> > >
> ______________________________________________________________________
> > > ______________
> > > > Cheap talk?
> > > > Check out Yahoo! Messenger's low PC-to-Phone
> call
> > > rates.
> > > > http://voice.yahoo.com
> > > >
> > >
> > >
> > >
> >
> >
> >
> >
> ______________________________________________________________________
> ______________
> > Sucker-punch spam with award-winning protection.
> > Try the free Yahoo! Mail Beta.
> http://advision.webevents.yahoo.com/mailbeta/features_spam.html
>
____________________________________________________________________________________
We won't tell. Get more on shows you hate to love
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http://tv.yahoo.com/collections/265
Reply by ●March 7, 20072007-03-07
I stand corrected !
Or perhaps, "some HW..."
PS : "to casual" of course was meant to read "too casual" :-)
Best Regards,
Kris
-----Original Message-----
From: m... [mailto:m...] On Behalf Of bumerang boom
Sent: Monday, 5 March 2007 7:51 PM
To: m...
Subject: RE: [msp430] LPM4 and LFXT1
This should be rephrased :)
It should read "A poor HW designer tends to ..."
Without Wax,
BB
--- Microbit wrote:
> Hi,
>
.
> HW designers tend to be to casual about crystals and
> their use in MCUs (aka ignorant).
>
> HTH
> Best Regards,
> Kris
Or perhaps, "some HW..."
PS : "to casual" of course was meant to read "too casual" :-)
Best Regards,
Kris
-----Original Message-----
From: m... [mailto:m...] On Behalf Of bumerang boom
Sent: Monday, 5 March 2007 7:51 PM
To: m...
Subject: RE: [msp430] LPM4 and LFXT1
This should be rephrased :)
It should read "A poor HW designer tends to ..."
Without Wax,
BB
--- Microbit wrote:
> Hi,
>
.
> HW designers tend to be to casual about crystals and
> their use in MCUs (aka ignorant).
>
> HTH
> Best Regards,
> Kris
