Hello forum members,

I am using following code to output ACLK, SMCLK and MCLK on
corresponding port pins.

void OutputMCLK (void)
{
P5DIR |= 0x10; // Select MCLK as output
P5SEL |= 0x10; // Select system functionality
}

void OutputSMCLK (void)
{
P5DIR |= 0x20; // Select SMCLK as output
P5SEL |= 0x20; // Select system functionality
}

void OutputACLK (void)
{
P5DIR |= 0x40; // Select ACLK as output
P5SEL |= 0x40; // Select system functionality
}

Following is the clock configuration code:

__SelectCrystalOsc proc
BIC #OSCOFF,SR // Turn on osc.
BIS.B #XTS+DIVA_1,BCSCTL1 // HF mode //ACLK Divide by 2
L1 BIC.B #OFIFG,&IFG1 // Clear OFIFG
MOV #0FFh,R15 // Delay
L2 DEC R15
JNZ L2
BIT.B #OFIFG,&IFG1 // Re?test OFIFG
JNZ L1 // Repeat test if needed
BIS.B #SELM1+SELM0,&BCSCTL2 // Select LFXT1CLK
BIS.B #DIVM_3,&BCSCTL2 // Mclk divide by 8 (crystal 1Mhz MCLK%0KHz)
BIS.B #SELS,&BCSCTL2 // Select LFXT1CLK for SMCLK
BIS.B #DIVS_3,&BCSCTL2 // SMClk divide by 8 (crystal 1Mhz
SMCLK%0KHz)
ret
endproc

With above code, I am getting proper output at ACLK = 250KHz and MCLK
= 1MHz but SMCLK is working at 18 Hz which should be 250KHz. Please
clarify the problem in code.

Thanks in advance.
Start a New Thread

"ssk2k4" :

> BIS.B #SELS,&BCSCTL2 // Select LFXT1CLK for SMCLK
>
> With above code, I am getting proper output at ACLK = 250KHz and MCLK
>= 1MHz but SMCLK is working at 18 Hz which should be 250KHz. Please
> clarify the problem in code.

You use ACLK for SMCLK.

M.
Start a New Thread

--- In m..., Matthias Weingart wrote:
>
> "ssk2k4" :
>
> > BIS.B #SELS,&BCSCTL2 // Select LFXT1CLK for SMCLK
> >
> > With above code, I am getting proper output at ACLK = 250KHz and
MCLK
> >= 1MHz but SMCLK is working at 18 Hz which should be 250KHz.
Please
> > clarify the problem in code.
>
> You use ACLK for SMCLK.
>
> M.
>
Hello Matthias,

I am bit confused with your answer. As per BCSCTL2 register, I have
configured SMCLK but still not working properly. Where am I using
ACLK for SMCLK? Please clarify in detail

Thanks in advance.
Start a New Thread

"ssk2k4" :

> --- In m..., Matthias Weingart wrote:
>>
>> You use ACLK for SMCLK.
>
> I am bit confused with your answer. As per BCSCTL2 register, I have
> configured SMCLK but still not working properly. Where am I using
> ACLK for SMCLK? Please clarify in detail

BIS.B #SELM1+SELM0,&BCSCTL2 // Select LFXT1CLK
BIS.B #DIVM_3,&BCSCTL2 // Mclk divide by 8 (crystal 1Mhz MCLK%0KHz)
BIS.B #SELS,&BCSCTL2 // Select LFXT1CLK for SMCLK
BIS.B #DIVS_3,&BCSCTL2 // SMClk divide by 8 (crystal 1Mhz SMCLK%0KHz)

You set SELM1+0. Hence you select LFXT1CLK. LFXT1CLK is the 32kHz crystal!
(btw. you can write the 4 lines above in one line).

M.
Start a New Thread

--- In m..., Matthias Weingart wrote:
>
> "ssk2k4" :
>
> > --- In m..., Matthias Weingart wrote:
> >>
> >> You use ACLK for SMCLK.
> >
> > I am bit confused with your answer. As per BCSCTL2 register, I
have
> > configured SMCLK but still not working properly. Where am I using
> > ACLK for SMCLK? Please clarify in detail
>
> BIS.B #SELM1+SELM0,&BCSCTL2 // Select LFXT1CLK
> BIS.B #DIVM_3,&BCSCTL2 // Mclk divide by 8 (crystal 1Mhz
MCLK%0KHz)
> BIS.B #SELS,&BCSCTL2 // Select LFXT1CLK for SMCLK
> BIS.B #DIVS_3,&BCSCTL2 // SMClk divide by 8 (crystal 1Mhz
SMCLK%0KHz)
>
> You set SELM1+0. Hence you select LFXT1CLK. LFXT1CLK is the 32kHz
crystal!
> (btw. you can write the 4 lines above in one line).
>
> M.
>
Thanks again Matthias. I am using external XTAL of 1 MHz not the 32
KHz.
What is the compact code?

Thanks in advance.
Start a New Thread

"ssk2k4" :

> What is the compact code?

BIS.B #SELM1+SELM0+DIVM_3+SELS+DIVS_3,&BCSCTL2

M.
Start a New Thread

--- In m..., Matthias Weingart wrote:
>
> "ssk2k4" :
>
> > What is the compact code?
>
> BIS.B #SELM1+SELM0+DIVM_3+SELS+DIVS_3,&BCSCTL2
>
> M.
>
Hello Matthias,

Thanks for your compact code.
Back to SMCLK query, I am using 1 MHz XTAL externally but still getting
SMCLK incorrect (18 Hz). Would be thankful if you clarify the error in
code or please provide the correct code?

Thanks in advance.
Start a New Thread