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Memfault Beyond the Launch

Instruction cycles

Started by Peter Grey July 16, 2003
I am using a MSP430F1121A and I cannot understand the times of 
instructions. I seem to have it ok but when checking on a scope I find it 
is not correct.
I am using a 32KHz crystal and using this for MCLK. I have the following 
instruction
bis.b	#ENABLE,&P1OUT,
bic.b #ENABLE,&P1OUT
bis.b	#ENABLE,&P1OUT.
I would have thought this instruction would take 5 cycles from what I read 
in the user guide but the positive pulse width I read is 122 microseconds 
which indicates a 4 cycle instruction. (1/327680.52 microseconds). Can 
someone point me in the right direction??

Thanks


Peter 



Beginning Microcontrollers with the MSP430

Peter,

> I am using a MSP430F1121A and I cannot understand
the times of 
> instructions. I seem to have it ok but when checking on a 
> scope I find it 
> is not correct.
> I am using a 32KHz crystal and using this for MCLK. I have 
> the following 
> instruction
> bis.b	#ENABLE,&P1OUT,
> bic.b #ENABLE,&P1OUT
> bis.b	#ENABLE,&P1OUT.
> I would have thought this instruction would take 5 cycles 
> from what I read 
> in the user guide but the positive pulse width I read is 122 
> microseconds 
> which indicates a 4 cycle instruction. (1/327680.52 
> microseconds). Can 
> someone point me in the right direction??

Ok, if ENABLE is not 0x01, 0x02, 0x04, or 0x08, 0x00, or 0xff, then
bic.b #ENABLE, &P1OUT is encoded as this:

  bic.b @pc+, P1OUT(R3)   ; R3 fixed to zero

This would take five cycles to execute.  However, if ENABLE is one of
the special values mentioned above, then the constant generator is used
for the source, knocking off one cycle.  The actual encoding of the
instruction is dependent upon the constant, but it takes fewer words to
encode (one less, in fact).

If you need five cycles, add a NOP after then original instruction.  NOP
is encoded as MOV R3, R3 and takes a single cycle to execute.

-- Paul.

At 09:48 AM 16/07/2003 +0100, you wrote:

Thanks Paul,
but where on earth did you find this information, specifically??

Peter
>Peter,
>
> > I am using a MSP430F1121A and I cannot understand the times of
> > instructions. I seem to have it ok but when checking on a
> > scope I find it
> > is not correct.
> > I am using a 32KHz crystal and using this for MCLK. I have
> > the following
> > instruction
> > bis.b #ENABLE,&P1OUT,
> > bic.b #ENABLE,&P1OUT
> > bis.b #ENABLE,&P1OUT.
> > I would have thought this instruction would take 5 cycles
> > from what I read
> > in the user guide but the positive pulse width I read is 122
> > microseconds
> > which indicates a 4 cycle instruction. (1/327680.52
> > microseconds). Can
> > someone point me in the right direction??
>
>Ok, if ENABLE is not 0x01, 0x02, 0x04, or 0x08, 0x00, or 0xff, then
>bic.b #ENABLE, &P1OUT is encoded as this:
>
>   bic.b @pc+, P1OUT(R3)   ; R3 fixed to zero
>
>This would take five cycles to execute.  However, if ENABLE is one of
>the special values mentioned above, then the constant generator is used
>for the source, knocking off one cycle.  The actual encoding of the
>instruction is dependent upon the constant, but it takes fewer words to
>encode (one less, in fact).
>
>If you need five cycles, add a NOP after then original instruction.  NOP
>is encoded as MOV R3, R3 and takes a single cycle to execute.
>
>-- Paul.
>
>
>.
>
>
>
>">http://docs.yahoo.com/info/terms/



What is the value of #ENABLE? remember that masks can also use the 
Constant Generator registers, so choose wisely Grasshopper, and 
interpret the path with care.

BIS.B 	Rx,&P1OUT is a 4 cycle instruction.

Al

Peter Grey wrote:

> I am using a MSP430F1121A and I cannot understand
the times of 
> instructions. I seem to have it ok but when checking on a scope I find it 
> is not correct.
> I am using a 32KHz crystal and using this for MCLK. I have the following 
> instruction
> bis.b	#ENABLE,&P1OUT,
> bic.b #ENABLE,&P1OUT
> bis.b	#ENABLE,&P1OUT.
> I would have thought this instruction would take 5 cycles from what I read 
> in the user guide but the positive pulse width I read is 122 microseconds 
> which indicates a 4 cycle instruction. (1/327680.52 microseconds). Can 
> someone point me in the right direction??
> 
> Thanks
> 
> 
> Peter 
> 
> 
> 
> 
> .
> 
>  
> 
> ">http://docs.yahoo.com/info/terms/ 
> 
> 
> 


Peter,

> Thanks Paul,
> but where on earth did you find this information, specifically??

Cycle information is in each of the family manuals, e.g. Table 5-2 for
format I instruction in SLAA049B p. 5-15.  Constant generator is
described in 5.1.4 in the same manual.

-- Paul.

Chapter 7 of SLAA024. It is there in SLAUO49, but it is not immediately 
obvious.

AL

Peter Grey wrote:

> At 09:48 AM 16/07/2003 +0100, you wrote:
> 
> Thanks Paul,
> but where on earth did you find this information, specifically??
> 
> Peter
> 
>>Peter,
>>
>>
>>>I am using a MSP430F1121A and I cannot understand the times of
>>>instructions. I seem to have it ok but when checking on a
>>>scope I find it
>>>is not correct.
>>>I am using a 32KHz crystal and using this for MCLK. I have
>>>the following
>>>instruction
>>>bis.b #ENABLE,&P1OUT,
>>>bic.b #ENABLE,&P1OUT
>>>bis.b #ENABLE,&P1OUT.
>>>I would have thought this instruction would take 5 cycles
>>>from what I read
>>>in the user guide but the positive pulse width I read is 122
>>>microseconds
>>>which indicates a 4 cycle instruction. (1/327680.52
>>>microseconds). Can
>>>someone point me in the right direction??
>>
>>Ok, if ENABLE is not 0x01, 0x02, 0x04, or 0x08, 0x00, or 0xff, then
>>bic.b #ENABLE, &P1OUT is encoded as this:
>>
>>  bic.b @pc+, P1OUT(R3)   ; R3 fixed to zero
>>
>>This would take five cycles to execute.  However, if ENABLE is one of
>>the special values mentioned above, then the constant generator is used
>>for the source, knocking off one cycle.  The actual encoding of the
>>instruction is dependent upon the constant, but it takes fewer words to
>>encode (one less, in fact).
>>
>>If you need five cycles, add a NOP after then original instruction.  NOP
>>is encoded as MOV R3, R3 and takes a single cycle to execute.
>>
>>-- Paul.
>>
>>
>>.
>>
>>
>>
>>">http://docs.yahoo.com/info/terms/
> 
> 
> 
> 
> 
> .
> 
>  
> 
> ">http://docs.yahoo.com/info/terms/ 
> 
> 
> 


Hi all,

I have read '5.2.8 clock cycles, length of instructions'... and this
didn't seem to make 
much sense to me. Is there anyone out there who can shed some light on this
subject in 
PLAIN english.
Motorola has good documentation on cycles/Instructions etc which is very easy to
understand.
TI's documentation seems to be hidden inside of IF, Else statements,.....my
opinion anyway.
I will run out of hair it I scratch my head any longer.

Dennis



Hi dennis. The first thing to do is to determine if the instruction is 
emulated or not, and what the emulation is. Next you have to determine 
the instruction format. Finally you need to decode the register usage 
that applies, if any. Format 1 are most instrcutions. Format 2 are 
instructions that have a destination but no source. ie INST dst

RRA/RRC/SWPB/SXT ARE FORMAT2, i'LL CALL TYPEX. PUSH/CALL ARE FORMAT 2 
I'LL CALL TYPEY


All jumps 	2c	;FORMAT 3 INSTRUCTIONS
RETI		5C	;MISC
TYPEX	Rx	1C
TYPEX	n(Rx)	4C
TYPEX	FOO	4C
TYPEX	&FOO	4C
TYPEX	@Rx	3C
TYPEX	@Rx+	3C	BUT SHOULDN'T BE USED
TYPEX	#100	3C
PUSH	Rx	3C
CALL	Rx	4C
TYPEY	n(Rx)	5C
TYPEY	FOO	5C
TYPEY	&FOO	5C
TYPEY	@Rx	4C
PUSH	@Rx+	4C
PUSH	#100	4C
CALL	@Rx+	5C
CALL	#100	5C

FORMAT 1 INSTRUCTIONS are those with src and dst, eg MOV src,dst, to 
illustrate using MOV

SINGLE CYCLE:

MOV	R14,R15

TWO CYCLE INSTRUCTIONS

MOV	R14,PC		
MOV	@R14,R15
MOV	@R14+,R15
MOV	#100,R15

THREE CYCLE INSTRUCTIONS

MOV	x(R14),R15
MOV	FOO,R15
MOV	&FOO,R15
MOV	@R14+,PC
MOV	#100,PC

FOUR CYCLE INSTRUCTIONS

MOV	R14,x(R15)
MOV	R14,FOO
MOV	R14,&FOO

FIVE CYCLE INSTRUCTIONS

MOV	@R14,x(R15)
MOV	@R14,FOO
MOV	@R14,&FOO
MOV	@R14+,x(R15)
MOV	@R14+,FOO
MOV	@R14+,&FOO
MOV	#100,x(R15)
MOV	#100,FOO
MOV	#100,&FOO

SIX CYCLE INSTRUCTIONS

MOV	x(R14),x(R15)
MOV	x(R14),FOO
MOV	x(R14,&F00
MOV	FOO,x(R15)
MOV	FOO2,FOO
MOV	FOO2,&F00
MOV	&FOO,x(R15)
MOV	&FOO2,FOO
MOV	&FOO2,&F00

In the above lists R14 and R15 represent any register except the 
constant generators and, where indicated, PC. #100 represents any 
absolute value in range. FOO is a label/name. Where either src or dst 
can be resolved to a value supplied by a constant register then the 
register format will be automatically substituted. For example:-

MOV	#0,R14 	APPEARS TO BE A 2 CYCLE INSTRUCTION, BUT WILL ENCODE AS A 
SINGLE CYCLE INSTRUCTION SINCE  0 IS SUPPLIED BY THE CONSTANT GENERATOR.

AL




Dennis McGrath wrote:

> Hi all,
> 
> I have read '5.2.8 clock cycles, length of instructions'... and
this didn't seem to make 
> much sense to me. Is there anyone out there who can shed some light on this
subject in 
> PLAIN english.
> Motorola has good documentation on cycles/Instructions etc which is very
easy to understand.
> TI's documentation seems to be hidden inside of IF, Else
statements,.....my opinion anyway.
> I will run out of hair it I scratch my head any longer.
> 
> Dennis
> 
> 
> 
> 
> .
> 
>  
> 
> ">http://docs.yahoo.com/info/terms/ 
> 
> 
> 


On 17 Jul 2003 at 16:52, onestone wrote:

> Hi dennis. The first thing to do is to determine
if the instruction is 
> emulated or not, and what the emulation is. Next you have to determine 
> the instruction format. Finally you need to decode the register usage 
> that applies, if any. Format 1 are most instrcutions. Format 2 are 
> instructions that have a destination but no source. ie INST dst
> 
> RRA/RRC/SWPB/SXT ARE FORMAT2, i'LL CALL TYPEX. PUSH/CALL ARE FORMAT 2 
> I'LL CALL TYPEY
> 
> 
> All jumps 	2c	;FORMAT 3 INSTRUCTIONS
> RETI		5C	;MISC
> TYPEX	Rx	1C
> TYPEX	n(Rx)	4C
> TYPEX	FOO	4C
> TYPEX	&FOO	4C
> TYPEX	@Rx	3C
> TYPEX	@Rx+	3C	BUT SHOULDN'T BE USED
> TYPEX	#100	3C
> PUSH	Rx	3C
> CALL	Rx	4C
> TYPEY	n(Rx)	5C
> TYPEY	FOO	5C
> TYPEY	&FOO	5C
> TYPEY	@Rx	4C
> PUSH	@Rx+	4C
> PUSH	#100	4C
> CALL	@Rx+	5C
> CALL	#100	5C
> 
> FORMAT 1 INSTRUCTIONS are those with src and dst, eg MOV src,dst, to 
> illustrate using MOV
> 
> SINGLE CYCLE:
> 
> MOV	R14,R15
> 
> TWO CYCLE INSTRUCTIONS
> 
> MOV	R14,PC		
> MOV	@R14,R15
> MOV	@R14+,R15
> MOV	#100,R15
> 
> THREE CYCLE INSTRUCTIONS
> 
> MOV	x(R14),R15
> MOV	FOO,R15
> MOV	&FOO,R15
> MOV	@R14+,PC
> MOV	#100,PC
> 
> FOUR CYCLE INSTRUCTIONS
> 
> MOV	R14,x(R15)
> MOV	R14,FOO
> MOV	R14,&FOO
> 
> FIVE CYCLE INSTRUCTIONS
> 
> MOV	@R14,x(R15)
> MOV	@R14,FOO
> MOV	@R14,&FOO
> MOV	@R14+,x(R15)
> MOV	@R14+,FOO
> MOV	@R14+,&FOO
> MOV	#100,x(R15)
> MOV	#100,FOO
> MOV	#100,&FOO
> 
> SIX CYCLE INSTRUCTIONS
> 
> MOV	x(R14),x(R15)
> MOV	x(R14),FOO
> MOV	x(R14,&F00
> MOV	FOO,x(R15)
> MOV	FOO2,FOO
> MOV	FOO2,&F00
> MOV	&FOO,x(R15)
> MOV	&FOO2,FOO
> MOV	&FOO2,&F00
> 
> In the above lists R14 and R15 represent any register except the 
> constant generators and, where indicated, PC. #100 represents any 
> absolute value in range. FOO is a label/name. Where either src or dst 
> can be resolved to a value supplied by a constant register then the 
> register format will be automatically substituted. For example:-
> 
> MOV	#0,R14 	APPEARS TO BE A 2 CYCLE INSTRUCTION, BUT WILL ENCODE AS A 
> SINGLE CYCLE INSTRUCTION SINCE  0 IS SUPPLIED BY THE CONSTANT GENERATOR.
> 
> AL
Thanks Al,
This is just what I needed, though I do feel I can no longer mention the
wallabies game 
with South Africa last week since you have gone to so much trouble to answer my 
question.
Simply Thanx
Dennis



Dennis McGrath wrote:

> On 17 Jul 2003 at 16:52, onestone wrote:
> 
> 
>>Hi dennis. The first thing to do is to determine if the instruction is 
>>emulated or not, and what the emulation is. Next you have to determine 
>>the instruction format. Finally you need to decode the register usage 
>>that applies, if any. Format 1 are most instrcutions. Format 2 are 
>>instructions that have a destination but no source. ie INST dst
>>
>>RRA/RRC/SWPB/SXT ARE FORMAT2, i'LL CALL TYPEX. PUSH/CALL ARE FORMAT
2 
>>I'LL CALL TYPEY
>>
>>
>>All jumps 	2c	;FORMAT 3 INSTRUCTIONS
>>RETI		5C	;MISC
>>TYPEX	Rx	1C
>>TYPEX	n(Rx)	4C
>>TYPEX	FOO	4C
>>TYPEX	&FOO	4C
>>TYPEX	@Rx	3C
>>TYPEX	@Rx+	3C	BUT SHOULDN'T BE USED
>>TYPEX	#100	3C
>>PUSH	Rx	3C
>>CALL	Rx	4C
>>TYPEY	n(Rx)	5C
>>TYPEY	FOO	5C
>>TYPEY	&FOO	5C
>>TYPEY	@Rx	4C
>>PUSH	@Rx+	4C
>>PUSH	#100	4C
>>CALL	@Rx+	5C
>>CALL	#100	5C
>>
>>FORMAT 1 INSTRUCTIONS are those with src and dst, eg MOV src,dst, to 
>>illustrate using MOV
>>
>>SINGLE CYCLE:
>>
>>MOV	R14,R15
>>
>>TWO CYCLE INSTRUCTIONS
>>
>>MOV	R14,PC		
>>MOV	@R14,R15
>>MOV	@R14+,R15
>>MOV	#100,R15
>>
>>THREE CYCLE INSTRUCTIONS
>>
>>MOV	x(R14),R15
>>MOV	FOO,R15
>>MOV	&FOO,R15
>>MOV	@R14+,PC
>>MOV	#100,PC
>>
>>FOUR CYCLE INSTRUCTIONS
>>
>>MOV	R14,x(R15)
>>MOV	R14,FOO
>>MOV	R14,&FOO
>>
>>FIVE CYCLE INSTRUCTIONS
>>
>>MOV	@R14,x(R15)
>>MOV	@R14,FOO
>>MOV	@R14,&FOO
>>MOV	@R14+,x(R15)
>>MOV	@R14+,FOO
>>MOV	@R14+,&FOO
>>MOV	#100,x(R15)
>>MOV	#100,FOO
>>MOV	#100,&FOO
>>
>>SIX CYCLE INSTRUCTIONS
>>
>>MOV	x(R14),x(R15)
>>MOV	x(R14),FOO
>>MOV	x(R14,&F00
>>MOV	FOO,x(R15)
>>MOV	FOO2,FOO
>>MOV	FOO2,&F00
>>MOV	&FOO,x(R15)
>>MOV	&FOO2,FOO
>>MOV	&FOO2,&F00
>>
>>In the above lists R14 and R15 represent any register except the 
>>constant generators and, where indicated, PC. #100 represents any 
>>absolute value in range. FOO is a label/name. Where either src or dst 
>>can be resolved to a value supplied by a constant register then the 
>>register format will be automatically substituted. For example:-
>>
>>MOV	#0,R14 	APPEARS TO BE A 2 CYCLE INSTRUCTION, BUT WILL ENCODE AS A 
>>SINGLE CYCLE INSTRUCTION SINCE  0 IS SUPPLIED BY THE CONSTANT GENERATOR.
>>
>>AL
> 
> Thanks Al,
> This is just what I needed, though I do feel I can no longer mention the
wallabies game 
> with South Africa last week since you have gone to so much trouble to
answer my 
> question.
> Simply Thanx
> Dennis

That was simply a cunning tactic, having dominated world rugby for so 
long the rest of you were becoming dispirited, pareticularly the South 
Africans, we needed to re-stimulate world interest in the game, to keep 
tyhe crowds up, by thinking their team might actually stand a chance 
against us.

You're welcome by the way.

Al



Memfault Beyond the Launch