Here is my 1 cent suggestion.

Set both P3OUT.4 and P3DIR high and keep them high all the time.

Clear P3SEL.4 low and keep it low whenever you are setting up the UART/I2C registers.

Set P3SEL.4 high only AFTER the UART/I2C is ready to operate. And clear P3SEL.4 BEFORE you try to stop UART/I2C.

--- In m..., "merapcb" wrote:
> No, no crosstalk. What I have found is that somehow this line is causing it: U0CTL &= ~SYNC
> But this does not make sense to me
>
> --- In m..., "Edward O'Reilly" wrote:
> >
> > Did you check to see if there might be some Crosstalk between adjacent PCB
> > traces?
> >
>

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