Hey everyone,
This is my first time working with the TI MSP430 Family. I am trying
to work my way around the MSP430's "FLL+ Clock Module". Given below is a
piece of code that my predecessor wrote. The TI Family user guide says upon PUC
the MCLK is 32 times ACLK (32.768KHz).
----------------------------------
FLL_CTL0 |= XCAP18PF; // for 32768 Hz crystal
unsigned int i=0;
for(i=0;i<50000;i++) // Wait here untill stabilization
{
_NOP();
}
----------------------------------
How can I measure the actual frequency on which the micro
controller is operating, I have a logic analyzer. I wrote a test code to give me
an idea, my code is given below,
----------------------------------
void main()
{
WDTCTL = WDTPW+WDTHOLD; // Stop watchdog timer
P1DIR |= BIT5; //Make P1.5 Output for Testing
FLL_CTL0 |= XCAP18PF // for 32768 Hz crystal
unsigned int i=0;
for(i=0;i<50000;i++) // Wait here untill stabilization
{
_NOP();
}
while(1)
{
P1OUT ^= BIT5; //Toggle P1.5 Continously
}
}
----------------------------------
I measured the frequency at P1.5 using logic analyzer which gave me a rough
value of ~ 948KHz. Can anyone tell me can I measure the micro's operating
frequency and what would be the best way to increase the speed in case there is
any need?
Rookie.
MSP430F4371 FFL + Clock Module
Started by ●May 11, 2011
Reply by ●May 12, 20112011-05-12
"Ahmed" :
> Hey everyone,
> This is my first time working with the TI MSP430 Family. I
> am trying to work my way around the MSP430's "FLL+ Clock
> Module". Given below is a piece of code that my predecessor
> wrote. The TI Family user guide says upon PUC the MCLK is 32
> times ACLK (32.768KHz).
>
> ----------------------------------
> FLL_CTL0 |= XCAP18PF; // for 32768 Hz crystal
>
> unsigned int i=0;
> for(i=0;i<50000;i++) // Wait here untill stabilization
> {
> _NOP();
> }
> ----------------------------------
> How can I measure the actual frequency on which the
> micro controller is operating, I have a logic analyzer.
> I wrote a test code to give me an idea, my code is
> given below,
To get the clock out of the MSP for your analyser - switch on the MCLK or
ACLK output on Port 5. Set the bit in the PSEL register of that port. The
port and pin is different on different derivatives of MSP430 - take a look in
the msp430f4xx data sheet or the datasheet of your controller.
To increase speed, change the bits in SCFI0 register.
Matthias
> Hey everyone,
> This is my first time working with the TI MSP430 Family. I
> am trying to work my way around the MSP430's "FLL+ Clock
> Module". Given below is a piece of code that my predecessor
> wrote. The TI Family user guide says upon PUC the MCLK is 32
> times ACLK (32.768KHz).
>
> ----------------------------------
> FLL_CTL0 |= XCAP18PF; // for 32768 Hz crystal
>
> unsigned int i=0;
> for(i=0;i<50000;i++) // Wait here untill stabilization
> {
> _NOP();
> }
> ----------------------------------
> How can I measure the actual frequency on which the
> micro controller is operating, I have a logic analyzer.
> I wrote a test code to give me an idea, my code is
> given below,
To get the clock out of the MSP for your analyser - switch on the MCLK or
ACLK output on Port 5. Set the bit in the PSEL register of that port. The
port and pin is different on different derivatives of MSP430 - take a look in
the msp430f4xx data sheet or the datasheet of your controller.
To increase speed, change the bits in SCFI0 register.
Matthias
