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[REPOST] MSP430F449 correct initialization sequence

Started by gripen_fighters October 20, 2011
Hello. I am using MSP 449 in a smart plug project, no battery for microcontroller supply, 3V3 comes from mains power supply. I have the following initialization sequence

//
disable_watchdog();
// Set SVS to generate POR, at Vcc < 2.8 V
SVSCTL = 0u;
SVSCTL = (PORON | VLD3);
// Setup system clock (MCLK) @ 8 MHz
do
{
IFG1 &= ~OFIFG; // Clear OSCFault flag
for (i = 0xFF; i > 0; i--) {} // Time for flag to set
} while (IFG1 & OFIFG); // OSCFault flag still set?

//set N multiplier
SCFQCTL = 0x3F ;
// Set D divider
SCFI0 = (0x80 | FN_3);

while ((0u != (FLL_CTL0 & DCOF)) || //DCO fault
(0u != (FLL_CTL0 & LFOF)) || // low F osc fault
(0u != (FLL_CTL0 & XT1OF)) // external 1 fault
)
{
} (*)

// set SVS to check external 1.2 on SVSIN if the mains power supply is is present (if it hasn't dropped after executing system clock initialization, if no mains power supply present -> just RESET)
Check_SVS_1V2();
In some cases I got the processor stuck in the while loop marked with (*). Should I remove the while or should I enable the watchdog before it? Is the intiialization correct or am I missing something?

Beginning Microcontrollers with the MSP430

I have tried to get the watchdog active before the while loop. But what can cause the FLL to set fault bits?

________________________________
From: gripen_fighters
To: m...
Sent: Thursday, October 20, 2011 7:01 AM
Subject: [msp430] [REPOST] MSP430F449 correct initialization sequence
 
Hello. I am using MSP 449 in a smart plug project, no battery for microcontroller supply, 3V3 comes from mains power supply. I have the following initialization sequence

//
disable_watchdog();
// Set SVS to generate POR, at Vcc < 2.8 V
SVSCTL = 0u;
SVSCTL = (PORON | VLD3);
// Setup system clock (MCLK) @ 8 MHz
do
{
IFG1 &= ~OFIFG; // Clear OSCFault flag
for (i = 0xFF; i > 0; i--) {} // Time for flag to set
} while (IFG1 & OFIFG); // OSCFault flag still set?

//set N multiplier
SCFQCTL = 0x3F ;
// Set D divider
SCFI0 = (0x80 | FN_3);

while ((0u != (FLL_CTL0 & DCOF)) || //DCO fault
(0u != (FLL_CTL0 & LFOF)) || // low F osc fault
(0u != (FLL_CTL0 & XT1OF)) // external 1 fault
)
{
} (*)

// set SVS to check external 1.2 on SVSIN if the mains power supply is is present (if it hasn't dropped after executing system clock initialization, if no mains power supply present -> just RESET)
Check_SVS_1V2();

In some cases I got the processor stuck in the while loop marked with (*). Should I remove the while or should I enable the watchdog before it? Is the intiialization correct or am I missing something?