Ok .... I am relatively new to MSP430 - I am using the values series
(more precise MSP430G2553) and I want to measure/convert 20V on A1 P1.1
- of course using a simple voltage divider to stay between 0 and 3.6V (I
am using Vss and Vcc as refferece).
Based on TI's datasheet using the ADC cannot seem to be more straight
forward but I have one thing that is driving me crazy ... no matter what
I do when I put the pin in analog input mode I get 3.6 volts on the pin
- say that is fine - but the pin is supposed to be in a high impedance
to not influence the sampled voltage and is clearly not . .. so when I
try to sample the input voltage this 3.6V on the P1.1 influences the
sampled voltage.
Circuit is something really simple:
|------- +20V
R1
P1.1/A1 <---+
R2
|
GND
R1QK, R2K => voltage on R2 is about 3.3 V @ peak 20V (I actually
have a volmeter that clearly measures 3.28V) . But here is the truly
werid thing .. when I connect P1.1 to the "mesuring point" I get a jump
of about 0.10V ... in top of the 3.28V .. literally like I am
increasing R2 with aroung 500 ohms or so. Anyone has any idea what the
heck is happening here ?!! P1.1 (or A1 if you prefer) should not
influence the input voltage in any way .. it should be in HiZ but
clearly is not.
Here is the code I use to initialise things:
WDTCTL = WDTPW + WDTHOLD; // Disable watchdog
BCSCTL1 = CALBC1_1MHZ;
DCOCTL = CALDCO_1MHZ;
//Set all pins as digital output and put them to zero
P1DIR = 0x00;
P1OUT = 0x00;
//configure P1.1/A1 as input
P1DIR |= BIT1; //checked using debug - after this voltage on P1.1 is
zero
//initialise ADC on P1.1/A1
ADC10CTL0 &= ~ENC; //disable first to make the ADC is in a known
state before setup
ADC10CTL0 = SREF_0 + ADC10SHT_2 +ADC10ON + ADC10IE; // Use Vcc/Vss
for Up/Low Refs, 16 x ADC10CLKs, turn on ADC with interrupts
ADC10CTL1 = INCH_1 + SHS_0 + ADC10SSEL_0 + ADC10DIV_0 + CONSEQ_0; //
A1 input, use ADC10CLK div 1, single channel mode
ADC10AE0 |= BIT1; // Enable ADC input on P1.1 but is not HiZ. WTF ?!
ADC pin not in HiZ .. or is it ?!!
Started by ●December 23, 2011
Reply by ●December 23, 20112011-12-23
On 12/23/2011 08:09 AM, Matthias Weingart wrote:
> You need to set P1SEL bit to enable the ADC functionality.
> Be also sure that no internal resistors are enabled (depending on device).
>
> M.
>
That was my first thought. But since I haven't used this chip I checked
the data sheet for the msp430G2553 and Table 16 shows the direction and
port function select bits as don't care if ADC10AE bits are set to 1.
The fact that setting a DIR bit to 1 makes the pin an output therefore
shouldn't be a problem.
Perhaps it is something subtle like ENC needing to be set to 1 before
the ADC10AE bits can control the port.
--
David W. Schultz
http://home.earthlink.net/~david.schultz
"Put down that pickle!"
> You need to set P1SEL bit to enable the ADC functionality.
> Be also sure that no internal resistors are enabled (depending on device).
>
> M.
>
That was my first thought. But since I haven't used this chip I checked
the data sheet for the msp430G2553 and Table 16 shows the direction and
port function select bits as don't care if ADC10AE bits are set to 1.
The fact that setting a DIR bit to 1 makes the pin an output therefore
shouldn't be a problem.
Perhaps it is something subtle like ENC needing to be set to 1 before
the ADC10AE bits can control the port.
--
David W. Schultz
http://home.earthlink.net/~david.schultz
"Put down that pickle!"
Reply by ●December 23, 20112011-12-23
You need to set P1SEL bit to enable the ADC functionality.
Be also sure that no internal resistors are enabled (depending on device).
M.
"morarcalin" :
> Ok .... I am relatively new to MSP430 - I am using the values series
> (more precise MSP430G2553) and I want to measure/convert 20V on A1 P1.1
> - of course using a simple voltage divider to stay between 0 and 3.6V (I
> am using Vss and Vcc as refferece).
>
> Based on TI's datasheet using the ADC cannot seem to be more straight
> forward but I have one thing that is driving me crazy ... no matter what
> I do when I put the pin in analog input mode I get 3.6 volts on the pin
> - say that is fine - but the pin is supposed to be in a high impedance
> to not influence the sampled voltage and is clearly not . .. so when I
> try to sample the input voltage this 3.6V on the P1.1 influences the
> sampled voltage.
>
> Circuit is something really simple:
>
> |------- +20V
> R1
> P1.1/A1 <---+
> R2
> |
> GND
>
> R1QK, R2K => voltage on R2 is about 3.3 V @ peak 20V (I actually
> have a volmeter that clearly measures 3.28V) . But here is the truly
> werid thing .. when I connect P1.1 to the "mesuring point" I get a jump
> of about 0.10V ... in top of the 3.28V .. literally like I am
> increasing R2 with aroung 500 ohms or so. Anyone has any idea what the
> heck is happening here ?!! P1.1 (or A1 if you prefer) should not
> influence the input voltage in any way .. it should be in HiZ but
> clearly is not.
>
> Here is the code I use to initialise things:
>
> WDTCTL = WDTPW + WDTHOLD; // Disable watchdog
>
> BCSCTL1 = CALBC1_1MHZ;
> DCOCTL = CALDCO_1MHZ;
>
> //Set all pins as digital output and put them to zero
> P1DIR = 0x00;
> P1OUT = 0x00;
> //configure P1.1/A1 as input
> P1DIR |= BIT1; //checked using debug - after this voltage on P1.1 is
> zero
>
> //initialise ADC on P1.1/A1
> ADC10CTL0 &= ~ENC; //disable first to make the ADC is in a known
> state before setup
> ADC10CTL0 = SREF_0 + ADC10SHT_2 +ADC10ON + ADC10IE; // Use Vcc/Vss
> for Up/Low Refs, 16 x ADC10CLKs, turn on ADC with interrupts
> ADC10CTL1 = INCH_1 + SHS_0 + ADC10SSEL_0 + ADC10DIV_0 + CONSEQ_0; //
> A1 input, use ADC10CLK div 1, single channel mode
> ADC10AE0 |= BIT1; // Enable ADC input on P1.1 but is not HiZ. WTF ?!
>
>
>
>
Be also sure that no internal resistors are enabled (depending on device).
M.
"morarcalin" :
> Ok .... I am relatively new to MSP430 - I am using the values series
> (more precise MSP430G2553) and I want to measure/convert 20V on A1 P1.1
> - of course using a simple voltage divider to stay between 0 and 3.6V (I
> am using Vss and Vcc as refferece).
>
> Based on TI's datasheet using the ADC cannot seem to be more straight
> forward but I have one thing that is driving me crazy ... no matter what
> I do when I put the pin in analog input mode I get 3.6 volts on the pin
> - say that is fine - but the pin is supposed to be in a high impedance
> to not influence the sampled voltage and is clearly not . .. so when I
> try to sample the input voltage this 3.6V on the P1.1 influences the
> sampled voltage.
>
> Circuit is something really simple:
>
> |------- +20V
> R1
> P1.1/A1 <---+
> R2
> |
> GND
>
> R1QK, R2K => voltage on R2 is about 3.3 V @ peak 20V (I actually
> have a volmeter that clearly measures 3.28V) . But here is the truly
> werid thing .. when I connect P1.1 to the "mesuring point" I get a jump
> of about 0.10V ... in top of the 3.28V .. literally like I am
> increasing R2 with aroung 500 ohms or so. Anyone has any idea what the
> heck is happening here ?!! P1.1 (or A1 if you prefer) should not
> influence the input voltage in any way .. it should be in HiZ but
> clearly is not.
>
> Here is the code I use to initialise things:
>
> WDTCTL = WDTPW + WDTHOLD; // Disable watchdog
>
> BCSCTL1 = CALBC1_1MHZ;
> DCOCTL = CALDCO_1MHZ;
>
> //Set all pins as digital output and put them to zero
> P1DIR = 0x00;
> P1OUT = 0x00;
> //configure P1.1/A1 as input
> P1DIR |= BIT1; //checked using debug - after this voltage on P1.1 is
> zero
>
> //initialise ADC on P1.1/A1
> ADC10CTL0 &= ~ENC; //disable first to make the ADC is in a known
> state before setup
> ADC10CTL0 = SREF_0 + ADC10SHT_2 +ADC10ON + ADC10IE; // Use Vcc/Vss
> for Up/Low Refs, 16 x ADC10CLKs, turn on ADC with interrupts
> ADC10CTL1 = INCH_1 + SHS_0 + ADC10SSEL_0 + ADC10DIV_0 + CONSEQ_0; //
> A1 input, use ADC10CLK div 1, single channel mode
> ADC10AE0 |= BIT1; // Enable ADC input on P1.1 but is not HiZ. WTF ?!
>
>
>
>
Reply by ●December 23, 20112011-12-23
On 12/23/2011 12:19 PM, morarcalin wrote:
> Yes David you are right, the ADC10AE0 bits completely override the
> digital IO settings, really does not matter if the pin is configured
> as IN or OUT. All in all my code is correct.
>
> I actually went more careful over TI's datasheet for MSP430G2553 and
> the it says that ADC input has an series input resistance of around
> 1K and capacitance of around 27pF. I re-calculated my divider with
> that and I was still off. Then by trial and error I got a divider
> that is 4.7K/1K that actually takes the input resistance in
> consideration and this works fine. So, looks to me that the 1K figure
> in the datasheet is completely wrong.
>
Except that the 1K input resistance cannot alter your voltage divider
because of that 27pF capacitance. But you do have to be careful that
your sample period is long enough for the capacitor to charge through
your divider network.
After a closer look at your settings I don't think you are using a long
enough sample time.
You selected the internal ADC10OSC as the clock source which could be
anywhere in the range of 3.7MHz to 6.3MHz. So use the worst case figure
of 6.3MHz. You are dividing that by one and using a sample period of 16
clocks so the sample time is 2.54us. With that 51K resistor in the
voltage divider it will take up to 10us or so to charge the 27pF cap.
The solution is to increase sample time or decrease the source impedance.
--
David W. Schultz
http://home.earthlink.net/~david.schultz
"Put down that pickle!"
> Yes David you are right, the ADC10AE0 bits completely override the
> digital IO settings, really does not matter if the pin is configured
> as IN or OUT. All in all my code is correct.
>
> I actually went more careful over TI's datasheet for MSP430G2553 and
> the it says that ADC input has an series input resistance of around
> 1K and capacitance of around 27pF. I re-calculated my divider with
> that and I was still off. Then by trial and error I got a divider
> that is 4.7K/1K that actually takes the input resistance in
> consideration and this works fine. So, looks to me that the 1K figure
> in the datasheet is completely wrong.
>
Except that the 1K input resistance cannot alter your voltage divider
because of that 27pF capacitance. But you do have to be careful that
your sample period is long enough for the capacitor to charge through
your divider network.
After a closer look at your settings I don't think you are using a long
enough sample time.
You selected the internal ADC10OSC as the clock source which could be
anywhere in the range of 3.7MHz to 6.3MHz. So use the worst case figure
of 6.3MHz. You are dividing that by one and using a sample period of 16
clocks so the sample time is 2.54us. With that 51K resistor in the
voltage divider it will take up to 10us or so to charge the 27pF cap.
The solution is to increase sample time or decrease the source impedance.
--
David W. Schultz
http://home.earthlink.net/~david.schultz
"Put down that pickle!"
