On Fri, 29 Jan 2016 13:52:45 -0600, Emmett Redd Ph.D. wrote:

> I am proposing to design and build an analog circuit
> intensive PCIe computer card. The analog circuit concepts
> are firmly in hand, but schematic capture, layout, etc.
> needs to be done. In fact, the core analog circuit is not
> extensive but the whole card has hundreds of repeats.
>
> But, I do not want the interface between the PCIe bus and my
> DACs and ADCs to be a learning attempt on my part and would
> like to find someone experienced here to design that
> interface, help with software driver development, and
> whatever else makes sense to hire done.
>
> Note: ITAR probably applies.
>
> Any recommendations of good providers that anyone has used
> or been will be appreciated.

From the above it sounds as though you thoroughly understand
your transducers and your analog sections, but need help with
the rest. It might help a little to expand your description
to help get serious recommendations:

* Critical layout issues already known?
* Sustained and burst transfer rates? (Buffering required?)
* Have you considered the M.2 x1, x2, and x4 NGFF? (Or is
this PCIe x1, x2, x4, x8, x16, or x32?)
* Commercial? Or scientific?
* Power?
* Closed loop control or open loop measurement?
* Operating environment?
* FPGA likely involved?
* You looking first for someone with broad knowledge to
guide the selection of others and guide the project or
will you handle the prioritization and selection?
* What equipment do you have on-site and what do you expect
to be available to those who help you? (scopes, etc.)
* Who is responsible for validating a stuffed board?

I don't have anyone in mind. I'm merely suggesting more
information to help stimulate discussion.

Jon

Posted by: Jon Kirwan




Start a New Thread

Jon,

Thanks for the list. Some things I can probably answer and some things need some study, but I will try to get a mostly complete set before I respond so the information is collected in one post rather that coming to the community in drips and drabs.

Emmett Redd Ph.D. mailto:E...@missouristate.edu
Professor (417)836-5221
Department of Physics, Astronomy, and Materials Science
Missouri State University Fax (417)836-6226
901 SOUTH NATIONAL Lab (417)836-3770
SPRINGFIELD, MO 65897 USA Dept (417)836-5131

In statesmanship get the formalities right, never mind about the moralities. -- Mark Twain.
________________________________________
From: m... [m...]
Sent: Friday, January 29, 2016 4:45 PM
To: MSP430 List
Subject: Re: [msp430] PCIe Card Engineering Services

On Fri, 29 Jan 2016 13:52:45 -0600, Emmett Redd Ph.D. wrote:

> I am proposing to design and build an analog circuit
> intensive PCIe computer card. The analog circuit concepts
> are firmly in hand, but schematic capture, layout, etc.
> needs to be done. In fact, the core analog circuit is not
> extensive but the whole card has hundreds of repeats.
>
> But, I do not want the interface between the PCIe bus and my
> DACs and ADCs to be a learning attempt on my part and would
> like to find someone experienced here to design that
> interface, help with software driver development, and
> whatever else makes sense to hire done.
>
> Note: ITAR probably applies.
>
> Any recommendations of good providers that anyone has used
> or been will be appreciated.

From the above it sounds as though you thoroughly understand
your transducers and your analog sections, but need help with
the rest. It might help a little to expand your description
to help get serious recommendations:

* Critical layout issues already known?
* Sustained and burst transfer rates? (Buffering required?)
* Have you considered the M.2 x1, x2, and x4 NGFF? (Or is
this PCIe x1, x2, x4, x8, x16, or x32?)
* Commercial? Or scientific?
* Power?
* Closed loop control or open loop measurement?
* Operating environment?
* FPGA likely involved?
* You looking first for someone with broad knowledge to
guide the selection of others and guide the project or
will you handle the prioritization and selection?
* What equipment do you have on-site and what do you expect
to be available to those who help you? (scopes, etc.)
* Who is responsible for validating a stuffed board?

I don't have anyone in mind. I'm merely suggesting more
information to help stimulate discussion.

Jon

Posted by: Jon Kirwan







Posted by: "Redd, Emmett R"




Start a New Thread

On Fri, 29 Jan 2016 13:52:45 -0600, Emmett Redd Ph.D. wrote:

> I am proposing to design and build an analog circuit
> intensive PCIe computer card. The analog circuit concepts
> are firmly in hand, but schematic capture, layout, etc.
> needs to be done. In fact, the core analog circuit is not
> extensive but the whole card has hundreds of repeats.
>
> But, I do not want the interface between the PCIe bus and my
> DACs and ADCs to be a learning attempt on my part and would
> like to find someone experienced here to design that
> interface, help with software driver development, and
> whatever else makes sense to hire done.
>
> Note: ITAR probably applies.
>
> Any recommendations of good providers that anyone has used
> or been will be appreciated.

From the above it sounds as though you thoroughly understand
your transducers and your analog sections, but need help with
the rest. It might help a little to expand your description
to help get serious recommendations:

* Critical layout issues already known?
* Sustained and burst transfer rates? (Buffering required?)
* Have you considered the M.2 x1, x2, and x4 NGFF? (Or is
this PCIe x1, x2, x4, x8, x16, or x32?)
* Commercial? Or scientific?
* Power?
* Closed loop control or open loop measurement?
* Operating environment?
* FPGA likely involved?
* You looking first for someone with broad knowledge to
guide the selection of others and guide the project or
will you handle the prioritization and selection?
* What equipment do you have on-site and what do you expect
to be available to those who help you? (scopes, etc.)
* Who is responsible for validating a stuffed board?

I don't have anyone in mind. I'm merely suggesting more
information to help stimulate discussion.

Jon

Posted by: Jon Kirwan j...@infinitefactors.org


Jon, Thanks for the questions. They are reproduced below with answers interspersed:

* Critical layout issues already known?
Area. My analog chips have a total quoted area of 11232 mm*mm on a conservative estimate PC board of 27000 mm*mm. And, I know there will have to be scale-setting resistors and diodes and decoupling capacitors, connectors, on-board voltage regulators, references, and the PCIe interface hardware. Maybe some of the passives can go on the back side of the board. The analog circuitry could be reduced in steps if it is impossible to fit everything in.

* Sustained and burst transfer rates? (Buffering required?)
My 8 DACs can take serial data at up to 50 MHz (400 MHz bandwidth?) and my 5 ADCs are between 10 and 20 MHz (100 MHz bandwidth?). So buffering from the 2.5 GHz will be needed.

* Have you considered the M.2 x1, x2, and x4 NGFF? (Or is
this PCIe x1, x2, x4, x8, x16, or x32?)
It is a full-size, plug-into-a-PC/workstation box so PCIe. The answer above implies x1 should be enough.

* Commercial? Or scientific?
Scientific, but want to keep commercial options open.

* Power?
With different chips covering the same area above, it is still an open question whether the analog ranges over +/-10 V or +/-2.5 V. Looking at the higher value, the analog portion of the board should be less than 80 W.

* Closed loop control or open loop measurement?
Actually, it emphasizes analog computation rather than control though control is possible.

* Operating environment?
MatLab under Windows.

* FPGA likely involved?
I expect the interface between the PCIe mixed-signal analog components is likely an FPGA. We are only familiar with VHDL on Xilinx FPGAs.

* You looking first for someone with broad knowledge to
guide the selection of others and guide the project or
will you handle the prioritization and selection?
I am very flexible on this point; my university, maybe not so. We will have to bid anything (since I expect the cost to be above $5k).

* What equipment do you have on-site and what do you expect
to be available to those who help you? (scopes, etc.)
We have a LogicPort and a LabJack and can get 60 MHz digital scopes, multimeters etc.

* Who is responsible for validating a stuffed board?
That might best be done by the stuffer, but we could negotiate that.

Emmett Redd Ph.D. mailto:E...@missouristate.edu
Professor (417)836-5221
Department of Physics, Astronomy, and Materials Science
Missouri State University Fax (417)836-6226
901 SOUTH NATIONAL Lab (417)836-3770
SPRINGFIELD, MO 65897 USA Dept (417)836-5131

In statesmanship get the formalities right, never mind about the moralities. -- Mark Twain.


Posted by: "Redd, Emmett R"




Start a New Thread

On Mon, 1 Feb 2016 16:04:45 -0600, you wrote:

>>On Fri, 29 Jan 2016 13:52:45 -0600, Emmett Redd Ph.D. wrote:
>>
>>> I am proposing to design and build an analog circuit
>>> intensive PCIe computer card. The analog circuit concepts
>>> are firmly in hand, but schematic capture, layout, etc.
>>> needs to be done. In fact, the core analog circuit is not
>>> extensive but the whole card has hundreds of repeats.
>>>
>>> But, I do not want the interface between the PCIe bus and my
>>> DACs and ADCs to be a learning attempt on my part and would
>>> like to find someone experienced here to design that
>>> interface, help with software driver development, and
>>> whatever else makes sense to hire done.
>>>
>>> Note: ITAR probably applies.
>>>
>>> Any recommendations of good providers that anyone has used
>>> or been will be appreciated.
>>
>>From the above it sounds as though you thoroughly understand
>>your transducers and your analog sections, but need help with
>>the rest. It might help a little to expand your description
>>to help get serious recommendations:
>>
>>* Critical layout issues already known?
>>* Sustained and burst transfer rates? (Buffering required?)
>>* Have you considered the M.2 x1, x2, and x4 NGFF? (Or is
>> this PCIe x1, x2, x4, x8, x16, or x32?)
>>* Commercial? Or scientific?
>>* Power?
>>* Closed loop control or open loop measurement?
>>* Operating environment?
>>* FPGA likely involved?
>>* You looking first for someone with broad knowledge to
>> guide the selection of others and guide the project or
>> will you handle the prioritization and selection?
>>* What equipment do you have on-site and what do you expect
>> to be available to those who help you? (scopes, etc.)
>>* Who is responsible for validating a stuffed board?
>>
>>I don't have anyone in mind. I'm merely suggesting more
>>information to help stimulate discussion.
>>
>>Jon
>
> Jon, Thanks for the questions. They are reproduced below
> with answers interspersed:
>
>>* Critical layout issues already known?

> Area. My analog chips have a total quoted area of 11232
> mm*mm on a conservative estimate PC board of 27000 mm*mm.
> And, I know there will have to be scale-setting resistors
> and diodes and decoupling capacitors, connectors, on-board
> voltage regulators, references, and the PCIe interface
> hardware. Maybe some of the passives can go on the back
> side of the board. The analog circuitry could be reduced in
> steps if it is impossible to fit everything in.

What about shielding (mu-metal cans), expected dissipation,
special high voltages, unusually low currents (fempto-amp),
unusually low voltages, etc?

>* Sustained and burst transfer rates? (Buffering required?)

> My 8 DACs can take serial data at up to 50 MHz (400 MHz
> bandwidth?) and my 5 ADCs are between 10 and 20 MHz (100 MHz
> bandwidth?). So buffering from the 2.5 GHz will be needed.

Is that sustained rates of data??? Or just bursts? How long
might a burst be? What's the longest stretch of total data
required? Will that have to be streamed to non-volatile
storage?

It's going to be very difficult to achieve those rates on a
sustained basis into any non-volatile storage (except perhaps
FeRAM or battery backed SRAM.) Let alone process it in real
time, if that's in the plan too. (If you really need
processing power, you might also consider connecting your
board to an NVidia graphics card (SLI) for access to its
processing power as an aux pre-processor before the x86 cpu
sees it.)

>* Have you considered the M.2 x1, x2, and x4 NGFF? (Or is
> this PCIe x1, x2, x4, x8, x16, or x32?)

> It is a full-size, plug-into-a-PC/workstation box so PCIe.
> The answer above implies x1 should be enough.

If the M.2 NGFF is used, stay with x4. Most motherboards will
support M.2 x4, I think. If PCIe card in a regular slot, then
stay with x8 or x16. Why less?

>* Commercial? Or scientific?

> Scientific, but want to keep commercial options open.

I was asking this because some all-in-one board design houses
will consider the idea of defraying some of the development
costs in exchange for commercial interest -- if they can be
convinced of that. But scientific pretty much doesn't even
open that opportunity door at all.

>* Power?

> With different chips covering the same area above, it is
> still an open question whether the analog ranges over +/-10
> V or +/-2.5 V. Looking at the higher value, the analog
> portion of the board should be less than 80 W.

I think this eliminates M.2, unless a separate power supply
is available. I also think it eliminates a "normal" PCIe
card, which is supposed to be capped at 25W absolute max if a
full height card, I think. The graphics cards are allowed up
to three times that, as I recall. This is going to be a
serious problem given that the analog alone might be 80W and
that you see an FPGA in there as well.

>* Closed loop control or open loop measurement?

> Actually, it emphasizes analog computation rather than
> control, though control is possible.

If closed loops are potentially involved, you really need to
find a specialist here... even if you don't do that at first.
This is because it is VERY hard to do closed loop controls in
the presence of phase delays and most especially when these
delays vary all over the place. You want as short a delay as
possible and you want that delay to be as predictable as
possible, as well, with zero or as little variation as
possible. These things feed DIRECTLY into the hardware design
as well as understanding the limitations of PCIe and other
delays/speed ups within a complex PC system. If you want to
avoid closing the door on the possibility, you'll want
someone knowledgeable on the topic to impact your other
design discussions along the way to make sure you don't do
something really dumb that makes it near impossible, later.

>* Operating environment?

> MatLab under Windows.

Egads. Forget what I said before. Direct closed loop on any
reasonable basis is probably out of the question now. It's
convenient. But....

>* FPGA likely involved?

> I expect the interface between the PCIe mixed-signal analog
> components is likely an FPGA. We are only familiar with
> VHDL on Xilinx FPGAs.

Yeah. VHDL (and manual floor planning) with Xilinx software
is where most of my experience is at, as well. But I read
verilog, too, like most people doing this kind of stuff.

>* You looking first for someone with broad knowledge to
> guide the selection of others and guide the project or
> will you handle the prioritization and selection?

> I am very flexible on this point; my university, maybe not
> so. We will have to bid anything (since I expect the cost
> to be above $5k).

Yeah. It's going to be over $5k. If it is going to be bid
out, it's best you do as much "study" as you can so that you
can be somewhat informed about both writing proposals and
reading responses.

A good way to find the right folks is to know some area or
two well enough that you can make some predictions about what
to expect as a likely "goal." Then look for proposals from
others that actually give you a prospective idea that matches
your own analysis (which you don't tell them in advance.) If
they tend to predict what they can achieve near what you feel
should be achievable, then you probably found someone who is
knowledgeable and not just blowing smoke. There might only be
one or two or three of these things. But use your own
strengths to find a few and then ask others to give you an
estimate of what they feel they can achieve there. Or, don't
even ask. Just see if any of the proposals touch on those
issues without your prompting and see what they say.

It is good to bet on someone who manages to comes back with
some estimates that, in areas you already know something,
look about like what you feel is right.

>* What equipment do you have on-site and what do you expect
> to be available to those who help you? (scopes, etc.)

> We have a LogicPort and a LabJack and can get 60 MHz digital
> scopes, multimeters etc.

60MHz?? Seriously? Crap. I have both analog and digital
scopes at 400MHz (Tek 2465B and an MSO from HP.) I guess that
won't be much of a burden for anyone.

>* Who is responsible for validating a stuffed board?

> That might best be done by the stuffer, but we could
> negotiate that.

I don't think the stuffer can verify much. I was asking about
verification of your functional goals. That requires
software, drivers, VHDL tools, probably networked JTAG tools,
and probably lots more.

Jon

Posted by: Jon Kirwan




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