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Problems with XT2 at F449

Started by gerdknese ●February 19, 2004
Hi Folks,

sorry about the german in my first message.

I need your help with a problem I have.
I've got a MSP430F449 on the Olimex-Headerboard
with a 32kHz XTAL at XT1 and a 8MHz XTAL at XT2 and
I want this device to run with 8MHz MCLK but it won't do so.

I use the ICC430 IDE from ImageCraft to compile my code and
the sourcecode has been transfered to the MSP via JTAG without any 
error.

Can anybody say what the problem is with this code?
I see 95kHz at Port 2 Pin 4 and not 2.6MHz as I hope.

Here is the sourcecode:
void main(void)
{
unsigned int i;
STOP_WATCHDOG
for(i=0; i<10000; ++i) asm ("NOP");
FLL_CTL1 &= ~XT2OFF;
do
{
IFG1 &= ~OFIFG;
for(i=0; i<256; i++) asm ("NOP");
} while((IFG1)&OFIFG!=0);
FLL_CTL1 |= (SELM_XT2 + SELS);
P2DIR = BIT4;
while(1)
{
P2OUT = BIT4;
P2OUT = 0;
}
}

Thank you in advance...

Beginning Microcontrollers with the MSP430

Reply by microbit ●February 19, 20042004-02-19
Hi,

Just in a glance :

- You should disable the FLL :    Set SCG0 in SR.
- The load caps aren't activated on the 32.768 ACLK
   Set FLL_CTL0, XCAP10PF is probably a good start.

I think your ACLK might be failing, but the OFIFG loop
doesn't pick it up because you clear OFIFG first, and then delay.

Delay first, and then clear OFIFG in the DO-WHILE loop.

It looks like OFIFG is asserting, and XT2 is not being used as
MCLK but DCO instead.
To check your MCLK being used, just set P1SEL and P1DIR to
output it and then you'll see what's going on.

-- Kris




----- Original Message -----
From: "gerdknese" <gerd.knese@gerd...>
To: <msp430@msp4...>
Sent: Friday, February 20, 2004 12:37 AM
Subject: [msp430] Problems with XT2 at F449


> Hi Folks,
>
> sorry about the german in my first message.
>
> I need your help with a problem I have.
> I've got a MSP430F449 on the Olimex-Headerboard
> with a 32kHz XTAL at XT1 and a 8MHz XTAL at XT2 and
> I want this device to run with 8MHz MCLK but it won't do so.
>
> I use the ICC430 IDE from ImageCraft to compile my code and
> the sourcecode has been transfered to the MSP via JTAG without any
> error.
>
> Can anybody say what the problem is with this code?
> I see 95kHz at Port 2 Pin 4 and not 2.6MHz as I hope.
>
> Here is the sourcecode:
> void main(void)
> {
> unsigned int i;
> STOP_WATCHDOG
> for(i=0; i<10000; ++i) asm ("NOP");
> FLL_CTL1 &= ~XT2OFF;
> do
> {
> IFG1 &= ~OFIFG;
> for(i=0; i<256; i++) asm ("NOP");
> } while((IFG1)&OFIFG!=0);
> FLL_CTL1 |= (SELM_XT2 + SELS);
> P2DIR = BIT4;
> while(1)
> {
> P2OUT = BIT4;
> P2OUT = 0;
> }
> }
>
> Thank you in advance...
>
>
>
> .
>
>
>
>
>
> --
------
> .
>
>
Reply by Bill Knight ●February 19, 20042004-02-19
The docs I have (slau056b - pg7-15) indicate the XT2
oscillator is turned OFF if the XT2OFF bit in FLL_CTL1
is a '0'.  It is turned ON if the bit is a '1'. 
Doesn't
make since considering the name of the bit, but that is
what it says.

-Bill Knight
R O SoftWare



On Thu, 19 Feb 2004 13:37:15 -0000, gerdknese wrote:

Hi Folks,

sorry about the german in my first message.

I need your help with a problem I have.
I've got a MSP430F449 on the Olimex-Headerboard
with a 32kHz XTAL at XT1 and a 8MHz XTAL at XT2 and
I want this device to run with 8MHz MCLK but it won't do so.

I use the ICC430 IDE from ImageCraft to compile my code and
the sourcecode has been transfered to the MSP via JTAG without any 
error.

Can anybody say what the problem is with this code?
I see 95kHz at Port 2 Pin 4 and not 2.6MHz as I hope.

Here is the sourcecode:
void main(void)

unsigned int i;
STOP_WATCHDOG
for(i=0; i<10000; ++i) asm ("NOP");
FLL_CTL1 &= ~XT2OFF;
do

IFG1 &= ~OFIFG;
for(i=0; i<256; i++) asm ("NOP");
} while((IFG1)&OFIFG!=0);
FLL_CTL1 |= (SELM_XT2 + SELS);
P2DIR = BIT4;
while(1)

P2OUT = BIT4;
P2OUT = 0;



Thank you in advance...



.


Yahoo! Groups Links
Reply by onestone ●February 19, 20042004-02-19
I think the problem lies in your clock stabilisation loop. Occasionally 
the clock will destabilise after stabilisation, and your short counter 
may not be enough. I don't use C or the 449, but here is my asm code for 
the 149.

;****** Start Clock initialisation

	MOV.B   #DCOCTL_DEFAULT,&DCOCTL         ;Reset DCO frequency to PUC value
	BIC     #OSCOFF+CPUOFF+SCG0+SCG1,SR     ;Force LFXT1, CPU ON,
ACTIVE MODE
	BIC.B	#XTS+XTOFF,&BCSCTL1		;LFXT1 = LOW FREQ, XT2 = ON

;****** Wait for clock stabilisation

INIT_CLK1:
         BIC.B   #OFIFG,&IFG1			;Clear oscillator fault flag
         MOV     #OSC_DELAY,R4           	;Delay for both oscillators
INIT_CLK11:
	BIT.B	#OFIFG,&IFG1
	JNZ	INIT_CLK1			;WAIT FOR NO OSC FAULT
	DEC	R4
	JNZ	INIT_CLK11			;WAIT WHILE NO FAULT FOR OSC_DELAY
	MOV	#OSC_DELAY,R4			;THEN DELAY ONE MORE TIME
INIT_CLK12:
	DEC	R4
	JNZ	INIT_CLK12
	BIC.B	#OFIFG,&IFG1
	MOV.B	#0B8H,&BCSCTL2			;MCLK = XT2/8 (LCD SLOW), SMCLK = XT2/1
         CLR.B   &IFG1                   	;Clear SFR pending interrupts 
in SFRs
         CLR.B   &IFG2

Cheers

Al

gerdknese wrote:
> Hi Folks,
> 
> sorry about the german in my first message.
> 
> I need your help with a problem I have.
> I've got a MSP430F449 on the Olimex-Headerboard
> with a 32kHz XTAL at XT1 and a 8MHz XTAL at XT2 and
> I want this device to run with 8MHz MCLK but it won't do so.
> 
> I use the ICC430 IDE from ImageCraft to compile my code and
> the sourcecode has been transfered to the MSP via JTAG without any 
> error.
> 
> Can anybody say what the problem is with this code?
> I see 95kHz at Port 2 Pin 4 and not 2.6MHz as I hope.
> 
> Here is the sourcecode:
> void main(void)
> {
> unsigned int i;
> STOP_WATCHDOG
> for(i=0; i<10000; ++i) asm ("NOP");
> FLL_CTL1 &= ~XT2OFF;
> do
> {
> IFG1 &= ~OFIFG;
> for(i=0; i<256; i++) asm ("NOP");
> } while((IFG1)&OFIFG!=0);
> FLL_CTL1 |= (SELM_XT2 + SELS);
> P2DIR = BIT4;
> while(1)
> {
> P2OUT = BIT4;
> P2OUT = 0;
> }
> }
> 
> Thank you in advance...
> 
> 
> 
> .
> 
>  
> Yahoo! Groups Links
> 
> 
> 
>  
> 
>
Reply by Bill Knight ●February 19, 20042004-02-19
Al
  You are right.  I missed that the first time through.
Here is my code in C.  It's for a F1xx series but should
server the purpose..

  // wait for (LF)XT1 oscillator to come up
  // clear OSC fault flag & set delay count
  // exit loop when no fault for delay count
  for (IFG1 &= ~OFIFG, delay = 255; delay; /* nothing */ )
    {
    if (IFG1 & OFIFG)                   // check OSC fault flag
      {
      // it's set
      IFG1 &= ~OFIFG;                   // clear OSC fault flag
      delay = 255;                      // reset delay count
      }
    else
      --delay;                          // clear, decrement delay
    }

-Bill

On Fri, 20 Feb 2004 09:40:59 +1030, onestone wrote:

I think the problem lies in your clock stabilisation loop. Occasionally 
the clock will destabilise after stabilisation, and your short counter 
may not be enough. I don't use C or the 449, but here is my asm code for 
the 149.

;****** Start Clock initialisation

	MOV.B   #DCOCTL_DEFAULT,&DCOCTL         ;Reset DCO frequency to PUC value
	BIC     #OSCOFF+CPUOFF+SCG0+SCG1,SR     ;Force LFXT1, CPU ON,
ACTIVE MODE
	BIC.B	#XTS+XTOFF,&BCSCTL1		;LFXT1 = LOW FREQ, XT2 = ON

;****** Wait for clock stabilisation

INIT_CLK1:
         BIC.B   #OFIFG,&IFG1			;Clear oscillator fault flag
         MOV     #OSC_DELAY,R4           	;Delay for both oscillators
INIT_CLK11:
	BIT.B	#OFIFG,&IFG1
	JNZ	INIT_CLK1			;WAIT FOR NO OSC FAULT
	DEC	R4
	JNZ	INIT_CLK11			;WAIT WHILE NO FAULT FOR OSC_DELAY
	MOV	#OSC_DELAY,R4			;THEN DELAY ONE MORE TIME
INIT_CLK12:
	DEC	R4
	JNZ	INIT_CLK12
	BIC.B	#OFIFG,&IFG1
	MOV.B	#0B8H,&BCSCTL2			;MCLK = XT2/8 (LCD SLOW), SMCLK = XT2/1
         CLR.B   &IFG1                   	;Clear SFR pending interrupts 
in SFRs
         CLR.B   &IFG2

Cheers

Al

gerdknese wrote:
> Hi Folks,
> 
> sorry about the german in my first message.
> 
> I need your help with a problem I have.
> I've got a MSP430F449 on the Olimex-Headerboard
> with a 32kHz XTAL at XT1 and a 8MHz XTAL at XT2 and
> I want this device to run with 8MHz MCLK but it won't do so.
> 
> I use the ICC430 IDE from ImageCraft to compile my code and
> the sourcecode has been transfered to the MSP via JTAG without any 
> error.
> 
> Can anybody say what the problem is with this code?
> I see 95kHz at Port 2 Pin 4 and not 2.6MHz as I hope.
> 
> Here is the sourcecode:
> void main(void)
> {
> unsigned int i;
> STOP_WATCHDOG
> for(i=0; i<10000; ++i) asm ("NOP");
> FLL_CTL1 &= ~XT2OFF;
> do
> {
> IFG1 &= ~OFIFG;
> for(i=0; i<256; i++) asm ("NOP");
> } while((IFG1)&OFIFG!=0);
> FLL_CTL1 |= (SELM_XT2 + SELS);
> P2DIR = BIT4;
> while(1)
> {
> P2OUT = BIT4;
> P2OUT = 0;
> }
> }
> 
> Thank you in advance...
> 
> 
> 
> .
> 
>  
> Yahoo! Groups Links
> 
> 
> 
>  
> 
> 




.


Yahoo! Groups Links
Reply by microbit ●February 20, 20042004-02-20
Oops,

Sorry, it was late at night, it is of course first clear flag and
then delay a bit.
I've never had problems with "destabilizing" after OFIFG clears,
but I call a simple generic delay function, that's always there case
there's
no timer channels available, and the OS uses everything.
This function delays 1 mS at 8 MHz, so it'd be several mS when booting 
off DCO, this is simpler and I don't think that a few mS will matter at
cold start....
This allows the oscillator plenty to settle properly.
Bear in mind that the Fault flag circuitry does NOT work on ACLK on F149.

-- Kris

> > Hi Folks,
> >
> > sorry about the german in my first message.
> >
> > I need your help with a problem I have.
> > I've got a MSP430F449 on the Olimex-Headerboard
> > with a 32kHz XTAL at XT1 and a 8MHz XTAL at XT2 and
> > I want this device to run with 8MHz MCLK but it won't do so.
> >
> > I use the ICC430 IDE from ImageCraft to compile my code and
> > the sourcecode has been transfered to the MSP via JTAG without any
> > error.
> >
> > Can anybody say what the problem is with this code?
> > I see 95kHz at Port 2 Pin 4 and not 2.6MHz as I hope.
> >
> > Here is the sourcecode:
> > void main(void)
> > {
> > unsigned int i;
> > STOP_WATCHDOG
> > for(i=0; i<10000; ++i) asm ("NOP");
> > FLL_CTL1 &= ~XT2OFF;
> > do
> > {
> > IFG1 &= ~OFIFG;
> > for(i=0; i<256; i++) asm ("NOP");
> > } while((IFG1)&OFIFG!=0);
> > FLL_CTL1 |= (SELM_XT2 + SELS);
> > P2DIR = BIT4;
> > while(1)
> > {
> > P2OUT = BIT4;
> > P2OUT = 0;
> > }
> > }
> >
> > Thank you in advance...
> >
> >
> >
> > .
> >
> >
> >
> >
> >
> > --
> ------
> > .
> >
> >
> 
> 
> 
> .
> 
> 
> 
> 
>       
>            
>      
>      
> 
> 
> --------
> . 
> 
>
Reply by gerdknese ●February 23, 20042004-02-23
Hi Folks,

thank you for your help.
I found my mistake and now my F449 is running
with 8.0MHz comming from XT2.

See you
Gerd

Here's the code:

  FLL_CTL1 = SELS + SELM_XT2;

  do
  {
    IFG1 &= ~OFIFG;	// clear the OFIFG
    for(i=0; i<256; i++) asm ("NOP");
  } while( IFG1 & OFIFG );

  P1DIR = 0x32;                   // P1.1, P1.4 & P1.5 to outputs
  P1SEL = 0x32;                   // P1.1, P1.4 & P1.5 functions to 
output


--- In msp430@msp4..., "microbit" <microbit@c...> wrote:
> Oops,
> 
> Sorry, it was late at night, it is of course first clear flag and
> then delay a bit.
> I've never had problems with "destabilizing" after OFIFG
clears,
> but I call a simple generic delay function, that's always there 
case there's
> no timer channels available, and the OS uses
everything.
> This function delays 1 mS at 8 MHz, so it'd be several mS when 
booting 
> off DCO, this is simpler and I don't think
that a few mS will 
matter at cold start....
> This allows the oscillator plenty to settle
properly.
> Bear in mind that the Fault flag circuitry does NOT work on ACLK 
on F149.
> 
> -- Kris
> 
> > > Hi Folks,
> > >
> > > sorry about the german in my first message.
> > >
> > > I need your help with a problem I have.
> > > I've got a MSP430F449 on the Olimex-Headerboard
> > > with a 32kHz XTAL at XT1 and a 8MHz XTAL at XT2 and
> > > I want this device to run with 8MHz MCLK but it won't do so.
> > >
> > > I use the ICC430 IDE from ImageCraft to compile my code and
> > > the sourcecode has been transfered to the MSP via JTAG without 
any
> > > error.
> > >
> > > Can anybody say what the problem is with this code?
> > > I see 95kHz at Port 2 Pin 4 and not 2.6MHz as I hope.
> > >
> > > Here is the sourcecode:
> > > void main(void)
> > > {
> > > unsigned int i;
> > > STOP_WATCHDOG
> > > for(i=0; i<10000; ++i) asm ("NOP");
> > > FLL_CTL1 &= ~XT2OFF;
> > > do
> > > {
> > > IFG1 &= ~OFIFG;
> > > for(i=0; i<256; i++) asm ("NOP");
> > > } while((IFG1)&OFIFG!=0);
> > > FLL_CTL1 |= (SELM_XT2 + SELS);
> > > P2DIR = BIT4;
> > > while(1)
> > > {
> > > P2OUT = BIT4;
> > > P2OUT = 0;
> > > }
> > > }
> > >
> > > Thank you in advance...
> > >
> > >
> > >
> > > .
> > >
> > >
> > >
> > >
> > >
> > > ---------------------------
-----------
> > ------
> > > Yahoo! Groups Links
> > >
> > >   a.. To visit your group on the web, go to:
> > >   http://groups.yahoo.com/group/msp430/
> > >
> > >   b.. .
> > >
> > >   c.. Your use of Yahoo! Groups is subject to the Yahoo! Terms 
of Service.
> > >
> > >
> > 
> > 
> > 
> > .
> > 
> > 
> > 
> > 
> >       
> >            
> >      
> >      
> > 
> > 
> > -----------------------------
---------------
> > Yahoo! Groups Links
> > 
> >   a.. To visit your group on the web, go to:
> >   http://groups.yahoo.com/group/msp430/
> >     
> >   b.. .
> >     
> >   c.. Your use of Yahoo! Groups is subject to the Yahoo! Terms 
of Service. 
> > 
> > 
> 
>
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