Trying to use 12bit ADC12 in a MSP430F449 on a Softbaugh BLCDA2
dev board.

Configuring ADC12 similar to  TI's sample code ads12_02.c
Using internal 2.5V ref.
Using P6.0 as the input
MCLK is 8Mhz, derived off a 32Khz crystal
ADC12 clock is MCLK/2 (4Mhz)
Using Extended Sample Mode, with ADC12SC bit controlling conversions.

If I feed P6.0 with a stiff variable voltage, for most values, the ADC 
converts
as expected, with about 1 bit of noise in the lsb.

For certain input voltages,  it goes crazy, with the ouput jumping 
between two
or three values separated by about 60 counts (not a power of two).

This only happens for a few dc levels, repeatable.

I've tried to improve VDD to VSS bypassing, and improve Vref bypassing;
no improvement.

I've played with increasing sampling time; no improvement.

I've  lowered the conversion  clock rate  (ADC12CLK); no  improvement.

It looks to me that the ADC is seeing  ground bounce (noise). The Softbaugh
dev board ties DVdd to AVdd, and DVss to AVss, respectively, against
TI's recommendation to keep them separate, and on separate ground planes.

The other possibility is that I just got a bad chip on the Softbaugh board.

Antbody have any ideas???

Mike Mladejovsky,
Sarcos
Salt Lake City.

Few questions/suggestions:
1. Does this happen when input voltage goes beyond
certain limits?
2. Is your Vcc 3.6V? For MCLK = 8 MHz your Vcc should
be 3.6 volts according to TI datasheets.
3. Deriving ADC clock of 4 MHz from a 32 kHz is not a
good idea for ADC. You will have a lot of jitter. Its
possible that your Vcc is marginally ok for 8MHz but
with the jitter you are going beyond the limit.

-Sumukh
 
--- MikeM <mladejov@mlad...> wrote:
> Trying to use 12bit ADC12 in a MSP430F449 on a
> Softbaugh BLCDA2
> dev board.
> 
> Configuring ADC12 similar to  TI's sample code
> ads12_02.c
> Using internal 2.5V ref.
> Using P6.0 as the input
> MCLK is 8Mhz, derived off a 32Khz crystal
> ADC12 clock is MCLK/2 (4Mhz)
> Using Extended Sample Mode, with ADC12SC bit
> controlling conversions.
> 
> If I feed P6.0 with a stiff variable voltage, for
> most values, the ADC 
> converts
> as expected, with about 1 bit of noise in the lsb.
> 
> For certain input voltages,  it goes crazy, with the
> ouput jumping 
> between two
> or three values separated by about 60 counts (not a
> power of two).
> 
> This only happens for a few dc levels, repeatable.
> 
> I've tried to improve VDD to VSS bypassing, and
> improve Vref bypassing;
> no improvement.
> 
> I've played with increasing sampling time; no
> improvement.
> 
> I've  lowered the conversion  clock rate 
> (ADC12CLK); no  improvement.
> 
> It looks to me that the ADC is seeing  ground bounce
> (noise). The Softbaugh
> dev board ties DVdd to AVdd, and DVss to AVss,
> respectively, against
> TI's recommendation to keep them separate, and on
> separate ground planes.
> 
> The other possibility is that I just got a bad chip
> on the Softbaugh board.
> 
> Antbody have any ideas???
> 
> Mike Mladejovsky,
> Sarcos
> Salt Lake City.
> 
> 
> 


====********************************
Sumukh Pathare
Email: sumukh@sumu...
Phone: 781-856-2054
********************************

I haven't used the '449, but it's ADC12 is probably
identical to that in 
the '149.

MikeM wrote:
> Trying to use 12bit ADC12 in a MSP430F449 on a Softbaugh BLCDA2
> dev board.
> 
> Configuring ADC12 similar to  TI's sample code ads12_02.c
> Using internal 2.5V ref.
> Using P6.0 as the input
> MCLK is 8Mhz, derived off a 32Khz crystal

I would consider the DCO too unstable for any kind of precision timed 
conversion. This is especially true if you are later filtering the data 
or running something like an FFT on it.

> ADC12 clock is MCLK/2 (4Mhz)
> Using Extended Sample Mode, with ADC12SC bit controlling conversions.
> 
> If I feed P6.0 with a stiff variable voltage, for most values, the ADC 
> converts
> as expected, with about 1 bit of noise in the lsb.
> 
> For certain input voltages,  it goes crazy, with the ouput jumping 
> between two
> or three values separated by about 60 counts (not a power of two).

Odd that it should occur at crtain values. What scale? you don't mention 
  whether these voltages are high end or low end.


> This only happens for a few dc levels, repeatable.

What levels, and have you tried levels in between. I also presume that 
you have monitored the input voltage noise with a high quality scope.

> 
> I've tried to improve VDD to VSS bypassing, and improve Vref
bypassing;
> no improvement.

Vref in, Vref out, Vdd and AVdd all need bypassing, make sure you 
haven't missed one. Even if unused they should be bypassed.

> 
> I've played with increasing sampling time; no improvement.
> 
> I've  lowered the conversion  clock rate  (ADC12CLK); no  improvement.
> 
> It looks to me that the ADC is seeing  ground bounce (noise). The Softbaugh
> dev board ties DVdd to AVdd, and DVss to AVss, respectively, against
> TI's recommendation to keep them separate, and on separate ground
planes.

I think this is the crux of the problem. Ti recommend that they can be 
joined at the IC at a single point. Other than that you should always 
run ground lines and whereever possible power lines as a star 
configuration, with analog and power completely separated. If Softbaugh 
have mixed them before the IC it is highly likely that this is causing 
your noise, after all each bit is only 625uV, so 60 counts is only 
37.5mV noise.

> 
> The other possibility is that I just got a bad chip on the Softbaugh board.

I doubt this, and there are other possibilities. ;@}

Cheers

Al

have you switched off all digital buffers of the pins running analog 
signals?
otherwise you can get "ringing" at certain voltages
good luck
Manfred

onestone schrieb:

>I haven't used the '449, but it's
ADC12 is probably identical to that in 
>the '149.
>
>MikeM wrote:
>  
>
>>Trying to use 12bit ADC12 in a MSP430F449 on a Softbaugh BLCDA2
>>dev board.
>>
>>Configuring ADC12 similar to  TI's sample code ads12_02.c
>>Using internal 2.5V ref.
>>Using P6.0 as the input
>>MCLK is 8Mhz, derived off a 32Khz crystal
>>    
>>
>
>I would consider the DCO too unstable for any kind of precision timed 
>conversion. This is especially true if you are later filtering the data 
>or running something like an FFT on it.
>
>  
>
>>ADC12 clock is MCLK/2 (4Mhz)
>>Using Extended Sample Mode, with ADC12SC bit controlling conversions.
>>
>>If I feed P6.0 with a stiff variable voltage, for most values, the ADC 
>>converts
>>as expected, with about 1 bit of noise in the lsb.
>>
>>For certain input voltages,  it goes crazy, with the ouput jumping 
>>between two
>>or three values separated by about 60 counts (not a power of two).
>>    
>>
>
>Odd that it should occur at crtain values. What scale? you don't
mention 
>  whether these voltages are high end or low end.
>
>
>  
>
>>This only happens for a few dc levels, repeatable.
>>    
>>
>
>What levels, and have you tried levels in between. I also presume that 
>you have monitored the input voltage noise with a high quality scope.
>
>  
>
>>I've tried to improve VDD to VSS bypassing, and improve Vref
bypassing;
>>no improvement.
>>    
>>
>
>Vref in, Vref out, Vdd and AVdd all need bypassing, make sure you 
>haven't missed one. Even if unused they should be bypassed.
>
>  
>
>>I've played with increasing sampling time; no improvement.
>>
>>I've  lowered the conversion  clock rate  (ADC12CLK); no 
improvement.
>>
>>It looks to me that the ADC is seeing  ground bounce (noise). The
Softbaugh
>>dev board ties DVdd to AVdd, and DVss to AVss, respectively, against
>>TI's recommendation to keep them separate, and on separate ground
planes.
>>    
>>
>
>I think this is the crux of the problem. Ti recommend that they can be 
>joined at the IC at a single point. Other than that you should always 
>run ground lines and whereever possible power lines as a star 
>configuration, with analog and power completely separated. If Softbaugh 
>have mixed them before the IC it is highly likely that this is causing 
>your noise, after all each bit is only 625uV, so 60 counts is only 
>37.5mV noise.
>
>  
>
>>The other possibility is that I just got a bad chip on the Softbaugh
board.
>>    
>>
>
>I doubt this, and there are other possibilities. ;@}
>
>Cheers
>
>Al
>
>
>
>
>.
>
> 
>Yahoo! Groups Links
>
>
>
> 
>
>
>
>  
>

-- 

mit herzlichen Gren

    Manfred, Ulm