Hi i'm new to the MSP430 and i'm currently playing around with
the 
F149 chip.

Anyhow i was just wondering what would be the best way to keep track 
of the number of rising edges that occurs when a clock is running.

I've looked into setting up TimerA in upmode with an ISR and then 
basically having a counter there to count each time the interrupt 
occurs.

But i was wondering if there is a better way of doing this.

Any help would be appreciated.

tom_sun79 wrote:
> Hi i'm new to the MSP430 and i'm
currently playing around with the 
> F149 chip.
> 
> Anyhow i was just wondering what would be the best way to keep track 
> of the number of rising edges that occurs when a clock is running.
> 
> I've looked into setting up TimerA in upmode with an ISR and then 
> basically having a counter there to count each time the interrupt 
> occurs.
> 
> But i was wondering if there is a better way of doing this.
> 
> Any help would be appreciated.

This is the simplest and most obvious way, since you are directly 
counting the very thing you wish to measure, clock cycles. Since the 
overflow rate for the timer at 8MHz is 8.192 msecs you might want to 
double buffer the counter, as the next 16 bit counter overflows at just 
8 minutes 56.870912 seconds. Adding a second counter, giving a 48 bit 
timer which runs for about 13 months before roll over.

There is really no other way of doing this internally, let alone a 
better way. At any point in time your sum of clock cycles is:_

	EXP2:EXP1:TAR

Al

Thanks for the reply, but i'm having a hard time visualizing that 
double buffer for some reason.

Can you show an example of what you mean or just an algorithim.  No 
code is necessary.





--- In msp430@msp4..., onestone <onestone@b...> wrote:
> tom_sun79 wrote:
> > Hi i'm new to the MSP430 and i'm currently playing around
with 
the 
> > F149 chip.
> > 
> > Anyhow i was just wondering what would be the best way to keep 
track 
> > of the number of rising edges that occurs
when a clock is 
running.
> > 
> > I've looked into setting up TimerA in upmode with an ISR and 
then 
> > basically having a counter there to count
each time the 
interrupt 
> > occurs.
> > 
> > But i was wondering if there is a better way of doing this.
> > 
> > Any help would be appreciated.
> 
> This is the simplest and most obvious way, since you are directly 
> counting the very thing you wish to measure, clock cycles. Since 
the 
> overflow rate for the timer at 8MHz is 8.192 msecs
you might want 
to 
> double buffer the counter, as the next 16 bit
counter overflows at 
just 
> 8 minutes 56.870912 seconds. Adding a second
counter, giving a 48 
bit 
> timer which runs for about 13 months before roll
over.
> 
> There is really no other way of doing this internally, let alone a 
> better way. At any point in time your sum of clock cycles is:_
> 
> 	EXP2:EXP1:TAR
> 
> Al

Using the Timer overflow interrupt, and making no assumptions about the 
clock rate, since you can handle the maths for that yourself:-

TMRA_OVF_ISR:
	INC	&BUFF1
	ADDC	#0,&BUFF2
	ADDC	#0,&BUFF3
	RETI

Gives you a 64 bit timer of the form:-

	BUFF3:BUFF2:BUFF1:TAR

Hope that clarifies it for you.

Al

tom_sun79 wrote:

> Thanks for the reply, but i'm having a hard
time visualizing that 
> double buffer for some reason.
> 
> Can you show an example of what you mean or just an algorithim.  No 
> code is necessary.
> 
> 
> 
> 
> 
> --- In msp430@msp4..., onestone <onestone@b...> wrote:
> 
>>tom_sun79 wrote:
>>
>>>Hi i'm new to the MSP430 and i'm currently playing around
with 
> 
> the 
> 
>>>F149 chip.
>>>
>>>Anyhow i was just wondering what would be the best way to keep 
> 
> track 
> 
>>>of the number of rising edges that occurs when a clock is 
> 
> running.
> 
>>>I've looked into setting up TimerA in upmode with an ISR and 
> 
> then 
> 
>>>basically having a counter there to count each time the 
> 
> interrupt 
> 
>>>occurs.
>>>
>>>But i was wondering if there is a better way of doing this.
>>>
>>>Any help would be appreciated.
>>
>>This is the simplest and most obvious way, since you are directly 
>>counting the very thing you wish to measure, clock cycles. Since 
> 
> the 
> 
>>overflow rate for the timer at 8MHz is 8.192 msecs you might want 
> 
> to 
> 
>>double buffer the counter, as the next 16 bit counter overflows at 
> 
> just 
> 
>>8 minutes 56.870912 seconds. Adding a second counter, giving a 48 
> 
> bit 
> 
>>timer which runs for about 13 months before roll over.
>>
>>There is really no other way of doing this internally, let alone a 
>>better way. At any point in time your sum of clock cycles is:_
>>
>>	EXP2:EXP1:TAR
>>
>>Al
> 
> 
> 
> 
> 
> .
> 
>  
> Yahoo! Groups Links
> 
> 
> 
>  
> 
>