Pedro Machado (@PedroMBMachado)
In the limit yes. The def. of FSM is "Finite state machine (FSM) is a term used by programmers,
mathematicians, engineers and other professionals to describe a...
Hi @Max_01, Not sure, why you mentioned "radar project" at all. The concept is simple microcontroller take inputs from sensors and provide outputs to actuators/display....
Hi, I would suggest you to use a voltage regulator for powering the second micro-controller. The circuit that you have shown is not ideal. Check out this link...
Hi, I really understand what you are saying. Found another one quite interesting.http://linuxgizmos.com/tiny-stackable-linux-based-...
Hi sorry for ear such a bad news. I am also using both the intel Galileo and Edison. Have you considered the Pi 0? https://www.adafruit.com/product/3400I found...
Dear psquare, Instead of arguing you cold perhaps try to do some brain storming. One of the big advantages of using ubuntu core is that the rootfs is already...
Hi psquare, Try this website link. The previous links that I have sent you allows you to configure linux for any embedded device.Best wishes,Pedro
Hi, First I would like to encourage you to read more about creating your own custom versions of your kernel link 1. And the reason for that is because you only...
Hi Shayne, I agree with the previous post. Do not use the JTAG TCK. Use instead the on-board clock. The ISE should do just just fine and the DLL should be...
Hi Shayne, Your project looks very interesting. I have some questions regarding the clock.1) What is the clock frequency? For example I do not see any issue of...
Hi Simon, Great that your sort out the second problem. Regarding the first problem, I think the problem is related with this:
"Unlike PCI or USB devices, SPI devices...
Hi Simon, It looks that it is trying to initialise twiceredefinition of '__inittest'
static inline initcall_t __inittest(void) \The driver can only initialise...
Could you please elaborate more?What do you mean when you say even build my own? Are you thinking of using FPGAs for building a RISC processor? If so have a look:https://opencores.org/project,risc_processorhttps://opencores.org/project,altor32https://opencores.org/project,lwrischttps://opencores.org/project,erpIn...
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