problem of the sdram initial

i have download the code example softpack-1.4-at91sam9260-ek-web
from the atmel homepage.according the at91sam9260 we should initial
the pll 、clk、watchdog 、pmc and external memroies such as nandflash
、sdram. In the assembly source code that perform low-level
initialization of the chip using LowLevelInit().But in the fuction
LowLevelIint i only find the function BOARD_RemapRam() which init the
at91sam9260 internal 4k sram.when i simulate these projects ，i find
the code load in the external sdram which begin at the address 0x2000
0000.
so i don't understand these project how to initial the sdram
because i didn't see any code which call the function
BOARD_ConfigureSdram().
// file board_cstartup_iar.s
resetHandler:

/* Set pc to actual code location (i.e. not in remap zone) */
LDR pc, =label

/* Perform low-level initialization of the chip using
LowLevelInit() */
label:
LDR r0, =LowLevelInit
LDR r4, =SFE(CSTACK)
MOV sp, r4
MOV lr, pc
BX r0

//file board_lowlevel.c
/*!
Performs the low-level initialization of the chip.
*/
void LowLevelInit()
{
unsigned char i;

//#if !defined(sdram)
/* Initialize main oscillator
****************************/
AT91C_BASE_PMC->PMC_MOR = BOARD_OSCOUNT | AT91C_CKGR_MOSCEN;
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));

/* Initialize PLLA at 200MHz (198.656) */
AT91C_BASE_PMC->PMC_PLLAR = BOARD_CKGR_PLLA
| BOARD_PLLACOUNT
| BOARD_MULA
| BOARD_DIVA;
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKA));

// Initialize PLLB for USB usage
AT91C_BASE_PMC->PMC_PLLBR = BOARD_USBDIV
| BOARD_CKGR_PLLB
| BOARD_PLLBCOUNT
| BOARD_MULB
| BOARD_DIVB;
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKB));

/* Wait for the master clock if it was already initialized */
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));

/* Switch to fast clock
**********************/
/* Switch to main oscillator + prescaler */
AT91C_BASE_PMC->PMC_MCKR = BOARD_PRESCALER;
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));

/* Switch to PLL + prescaler */
AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLLA_CLK;
while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
//#endif //#if !defined(sdram)

/* Initialize AIC
****************/
AT91C_BASE_AIC->AIC_IDCR = 0xFFFFFFFF;
AT91C_BASE_AIC->AIC_SVR[0] = (unsigned int) defaultFiqHandler;
for (i = 1; i < 31; i++) {

AT91C_BASE_AIC->AIC_SVR[i] = (unsigned int) defaultIrqHandler;
}
AT91C_BASE_AIC->AIC_SPU = (unsigned int) defaultSpuriousHandler;

// Unstack nested interrupts
for (i = 0; i < 8 ; i++) {

AT91C_BASE_AIC->AIC_EOICR = 0;
}
/* Watchdog initialization
*************************/
AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;

/* Remap
*******/
BOARD_RemapRam();

// Disable RTT and PIT interrupts (potential problem when program A
// configures RTT, then program B wants to use PIT only, interrupts
// from the RTT will still occur since they both use AT91C_ID_SYS)
AT91C_BASE_RTTC->RTTC_RTMR &= ~(AT91C_RTTC_ALMIEN |
AT91C_RTTC_RTTINCIEN);
AT91C_BASE_PITC->PITC_PIMR &= ~AT91C_PITC_PITIEN;
}

// file board_memories.c
void BOARD_RemapRam()
{
WRITE(AT91C_BASE_MATRIX,
MATRIX_MRCR,
(AT91C_MATRIX_RCA926I | AT91C_MATRIX_RCA926D));
}
//the function just initial the interal sram .
please help!!!
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I am not very good with SDRAM, and my experience with SDRAM initialization has not been very good. I once had the same problem that you are facing with the AT91RM9200, and I had to give it up. But I have a question, since I would also be interested in having SDRAM on my board. I want to know what is the actual SDRAM hardware used on the AT91SAM boards? Suppose the AT91SAM9260 like you say, what is the SDRAM part number? By looking at the ATMEL hardware files for AT91SAM9260-EK board for example, is this mentioned?
Thank you and best regards.

----- Original Message ----
From: fengtao622
To: A...
Sent: Wednesday, September 10, 2008 4:50:34 AM
Subject: [AT91SAM] problem of the sdram initial
i have download the code example softpack-1.4- at91sam9260- ek-web
from the atmel homepage.according the at91sam9260 we should initial
the pll $B!"(Bclk$B!"(Bwatchdog $B!"(Bpmc and external memroies such as nandflash
$B!"(Bsdram. In the assembly source code that perform low-level
initialization of the chip using LowLevelInit( ).But in the fuction
LowLevelIint i only find the function BOARD_RemapRam( ) which init the
at91sam9260 internal 4k sram.when i simulate these projects $B!$(Bi find
the code load in the external sdram which begin at the address 0x2000
0000.
so i don't understand these project how to initial the sdram
because i didn't see any code which call the function
BOARD_ConfigureSdra m().

// file board_cstartup_ iar.s
resetHandler:

/* Set pc to actual code location (i.e. not in remap zone) */
LDR pc, =label

/* Perform low-level initialization of the chip using
LowLevelInit( ) */
label:
LDR r0, =LowLevelInit
LDR r4, =SFE(CSTACK)
MOV sp, r4
MOV lr, pc
BX r0

//file board_lowlevel. c
/*!
Performs the low-level initialization of the chip.
*/
void LowLevelInit( )
{
unsigned char i;

//#if !defined(sdram)
/* Initialize main oscillator
************ ********* *******/
AT91C_BASE_PMC- >PMC_MOR = BOARD_OSCOUNT | AT91C_CKGR_MOSCEN;
while (!(AT91C_BASE_ PMC->PMC_ SR & AT91C_PMC_MOSCS) );

/* Initialize PLLA at 200MHz (198.656) */
AT91C_BASE_PMC- >PMC_PLLAR = BOARD_CKGR_PLLA
| BOARD_PLLACOUNT
| BOARD_MULA
| BOARD_DIVA;
while (!(AT91C_BASE_ PMC->PMC_ SR & AT91C_PMC_LOCKA) );

// Initialize PLLB for USB usage
AT91C_BASE_PMC- >PMC_PLLBR = BOARD_USBDIV
| BOARD_CKGR_PLLB
| BOARD_PLLBCOUNT
| BOARD_MULB
| BOARD_DIVB;
while (!(AT91C_BASE_ PMC->PMC_ SR & AT91C_PMC_LOCKB) );

/* Wait for the master clock if it was already initialized */
while (!(AT91C_BASE_ PMC->PMC_ SR & AT91C_PMC_MCKRDY) );

/* Switch to fast clock
************ ********* */
/* Switch to main oscillator + prescaler */
AT91C_BASE_PMC- >PMC_MCKR = BOARD_PRESCALER;
while (!(AT91C_BASE_ PMC->PMC_ SR & AT91C_PMC_MCKRDY) );

/* Switch to PLL + prescaler */
AT91C_BASE_PMC- >PMC_MCKR |= AT91C_PMC_CSS_ PLLA_CLK;
while (!(AT91C_BASE_ PMC->PMC_ SR & AT91C_PMC_MCKRDY) );
//#endif //#if !defined(sdram)

/* Initialize AIC
************ ****/
AT91C_BASE_AIC- >AIC_IDCR = 0xFFFFFFFF;
AT91C_BASE_AIC- >AIC_SVR[ 0] = (unsigned int) defaultFiqHandler;
for (i = 1; i < 31; i++) {

AT91C_BASE_AIC- >AIC_SVR[ i] = (unsigned int) defaultIrqHandler;
}
AT91C_BASE_AIC- >AIC_SPU = (unsigned int) defaultSpuriousHand ler;

// Unstack nested interrupts
for (i = 0; i < 8 ; i++) {

AT91C_BASE_AIC- >AIC_EOICR = 0;
}

/* Watchdog initialization
************ ********* ****/
AT91C_BASE_WDTC- >WDTC_WDMR = AT91C_WDTC_WDDIS;

/* Remap
*******/
BOARD_RemapRam( );

// Disable RTT and PIT interrupts (potential problem when program A
// configures RTT, then program B wants to use PIT only, interrupts
// from the RTT will still occur since they both use AT91C_ID_SYS)
AT91C_BASE_RTTC- >RTTC_RTMR &= ~(AT91C_RTTC_ ALMIEN |
AT91C_RTTC_RTTINCIE N);
AT91C_BASE_PITC- >PITC_PIMR &= ~AT91C_PITC_ PITIEN;
}

// file board_memories. c
void BOARD_RemapRam( )
{
WRITE(AT91C_ BASE_MATRIX,
MATRIX_MRCR,
(AT91C_MATRIX_ RCA926I | AT91C_MATRIX_ RCA926D)) ;
}
//the function just initial the interal sram .
please help!!! Start a New Thread