> -----Original Message-----
> From: l...
> [mailto:l...]On Behalf
> Of Sutton Mehaffey
> Sent: Tuesday, January 09, 2007 3:41 PM
> To: l...
> Subject: [lpc2000] Re: UART1 RX LPC2148
> Anybody know where the decription of the CPSR register (for global
> interrupts) is. I can't seem to find it in the user's manual. I
> think it is being set in startup, because my other interrupts work,
> and there is no mention in any of my code. I apologize if it is plain
> daylight, but I can't find it. :(
>
> Sutton
Since the CPSR is an ARM register, not a peripheral register, probably
it could be found in one of the ARM reference manuals. Though, I
haven't looked for it.
Mike
UART1 RX LPC2148
Started by ●January 9, 2007
Reply by ●January 9, 20072007-01-09
Reply by ●January 9, 20072007-01-09
OK, thanks. That makes more sense.
--- In l..., "Michael Anton" wrote:
>
> > -----Original Message-----
> > From: l...
> > [mailto:l...]On Behalf
> > Of Sutton Mehaffey
> > Sent: Tuesday, January 09, 2007 3:41 PM
> > To: l...
> > Subject: [lpc2000] Re: UART1 RX LPC2148
> >
> >
> > Anybody know where the decription of the CPSR register (for global
> > interrupts) is. I can't seem to find it in the user's manual. I
> > think it is being set in startup, because my other interrupts work,
> > and there is no mention in any of my code. I apologize if it is plain
> > daylight, but I can't find it. :(
> >
> > Sutton
> >
> > Since the CPSR is an ARM register, not a peripheral register, probably
> it could be found in one of the ARM reference manuals. Though, I
> haven't looked for it.
>
> Mike
>
--- In l..., "Michael Anton" wrote:
>
> > -----Original Message-----
> > From: l...
> > [mailto:l...]On Behalf
> > Of Sutton Mehaffey
> > Sent: Tuesday, January 09, 2007 3:41 PM
> > To: l...
> > Subject: [lpc2000] Re: UART1 RX LPC2148
> >
> >
> > Anybody know where the decription of the CPSR register (for global
> > interrupts) is. I can't seem to find it in the user's manual. I
> > think it is being set in startup, because my other interrupts work,
> > and there is no mention in any of my code. I apologize if it is plain
> > daylight, but I can't find it. :(
> >
> > Sutton
> >
> > Since the CPSR is an ARM register, not a peripheral register, probably
> it could be found in one of the ARM reference manuals. Though, I
> haven't looked for it.
>
> Mike
>
Reply by ●January 9, 20072007-01-09
--- Sutton Mehaffey wrote:
> - I have an infinite loop (main) printing out U1IIR
> which is always
> 0xc1 as soon as everything is setup. I don't think
> this is correct
> (pending interrupt).
U1IIR value 0x31 does not mean that you have pending
irq. Bit 0 in UxIIR is high if you don't have irq and
is active low if you have irq.
I think that you make a mistake putting read of U1IIR
in the main loop. Because reading U1IIR clears the irq
flags. Perhaps this is confusing the VIC and it can
not determine the source of irq.
Calling a function from inside the ISR demands that
you have setup properly the irq stack in the startup
code.
Don't look for CPSR description in the NXP user
manual. Instead find "ARM Architecture Reference
Manual" from ARM.
Regards
Zdravko Dimitrov
Знанието е лично преживяна истина.
__________________________________________________
> - I have an infinite loop (main) printing out U1IIR
> which is always
> 0xc1 as soon as everything is setup. I don't think
> this is correct
> (pending interrupt).
U1IIR value 0x31 does not mean that you have pending
irq. Bit 0 in UxIIR is high if you don't have irq and
is active low if you have irq.
I think that you make a mistake putting read of U1IIR
in the main loop. Because reading U1IIR clears the irq
flags. Perhaps this is confusing the VIC and it can
not determine the source of irq.
Calling a function from inside the ISR demands that
you have setup properly the irq stack in the startup
code.
Don't look for CPSR description in the NXP user
manual. Instead find "ARM Architecture Reference
Manual" from ARM.
Regards
Zdravko Dimitrov
Знанието е лично преживяна истина.
__________________________________________________
Reply by ●January 9, 20072007-01-09
--- In l..., "Sutton Mehaffey" wrote:
>
> Anybody know where the decription of the CPSR register (for global
> interrupts) is. I can't seem to find it in the user's manual. I
> think it is being set in startup, because my other interrupts work,
> and there is no mention in any of my code. I apologize if it is plain
> daylight, but I can't find it. :(
>
> Sutton
>
The "Current Program Status Register" (CPSR) is not documented in an
LPC manual because it is part of the ARM processor. It is accessed by
the MRS and MSR assembly language instructions.
***************Quoted from the ARM Architecture Reference Manual*****
The CPSR holds:
4 condition code flags (Negative, Zero, Carry and oVerflow)
2 interrupt disable bits, one for each type of interrupt
5 bits which encode the current processor mode
1 bit which encodes whether ARM or Thumb instructions are being
executed.
*************END Quote from the ARM Architecture Reference Manual*****
>
> Anybody know where the decription of the CPSR register (for global
> interrupts) is. I can't seem to find it in the user's manual. I
> think it is being set in startup, because my other interrupts work,
> and there is no mention in any of my code. I apologize if it is plain
> daylight, but I can't find it. :(
>
> Sutton
>
The "Current Program Status Register" (CPSR) is not documented in an
LPC manual because it is part of the ARM processor. It is accessed by
the MRS and MSR assembly language instructions.
***************Quoted from the ARM Architecture Reference Manual*****
The CPSR holds:
4 condition code flags (Negative, Zero, Carry and oVerflow)
2 interrupt disable bits, one for each type of interrupt
5 bits which encode the current processor mode
1 bit which encodes whether ARM or Thumb instructions are being
executed.
*************END Quote from the ARM Architecture Reference Manual*****
Reply by ●January 9, 20072007-01-09
Zdravko,
You hit the nail on the head. Reading U1IIR in the main loop was
causing the interrupt not to fire. Thanks a lot.
Sutton
--- In l..., 3gpabko wrote:
> --- Sutton Mehaffey wrote:
>
> > - I have an infinite loop (main) printing out U1IIR
> > which is always
> > 0xc1 as soon as everything is setup. I don't think
> > this is correct
> > (pending interrupt).
>
> U1IIR value 0x31 does not mean that you have pending
> irq. Bit 0 in UxIIR is high if you don't have irq and
> is active low if you have irq.
>
> I think that you make a mistake putting read of U1IIR
> in the main loop. Because reading U1IIR clears the irq
> flags. Perhaps this is confusing the VIC and it can
> not determine the source of irq.
>
> Calling a function from inside the ISR demands that
> you have setup properly the irq stack in the startup
> code.
>
> Don't look for CPSR description in the NXP user
> manual. Instead find "ARM Architecture Reference
> Manual" from ARM.
> Regards
> Zdravko Dimitrov
>
> Знанието е
лично
преживяна
истина.
>
> __________________________________________________
You hit the nail on the head. Reading U1IIR in the main loop was
causing the interrupt not to fire. Thanks a lot.
Sutton
--- In l..., 3gpabko wrote:
> --- Sutton Mehaffey wrote:
>
> > - I have an infinite loop (main) printing out U1IIR
> > which is always
> > 0xc1 as soon as everything is setup. I don't think
> > this is correct
> > (pending interrupt).
>
> U1IIR value 0x31 does not mean that you have pending
> irq. Bit 0 in UxIIR is high if you don't have irq and
> is active low if you have irq.
>
> I think that you make a mistake putting read of U1IIR
> in the main loop. Because reading U1IIR clears the irq
> flags. Perhaps this is confusing the VIC and it can
> not determine the source of irq.
>
> Calling a function from inside the ISR demands that
> you have setup properly the irq stack in the startup
> code.
>
> Don't look for CPSR description in the NXP user
> manual. Instead find "ARM Architecture Reference
> Manual" from ARM.
> Regards
> Zdravko Dimitrov
>
> Знанието е
лично
преживяна
истина.
>
> __________________________________________________
