Re: Consistency of DCO parameters across multiple samples of a given par

Started by "Fed...@yahoo.com [msp430]" in MSP4304 weeks ago

DCO is not accurate indeed. That's why TI programs DCO values during manufacturing. Some kind of calibration is inevitable.

DCO is not accurate indeed. That's why TI programs DCO values during manufacturing. Some kind of calibration is inevitable.


Consistency of DCO parameters across multiple samples of a given part number?

Started by "Dav...@yahoo.com [msp430]" in MSP4304 weeks ago 1 reply

I am working on a project that uses MSP430G2452IPW14 (14 pin TSSOP package.) At initialization, I set MCLK and SMCLK sourced from DCO and set...

I am working on a project that uses MSP430G2452IPW14 (14 pin TSSOP package.) At initialization, I set MCLK and SMCLK sourced from DCO and set DCO to my chosen clock frequency (I did not rely on Info flash segment D calibration parameters, as those didn't yield the frequency I require.) I was surprised to find upon building my second prototype of the project that the DCO frequency, using the ...


[AVR] What assembler to use?

Started by Johann Klammer in comp.arch.embedded1 month ago 14 replies
AVR

I've just been trying to use avra, but it outputs coff or something, so obdump has trouble disassembling it. I am also not sure how to link the...

I've just been trying to use avra, but it outputs coff or something, so obdump has trouble disassembling it. I am also not sure how to link the result(ihex have no symbol info). So now I believe the thing is next to unusable. Someone correct me if I am wrong, plz. Are there any other, usable alternatives to Gas that have usable macro constructs (+labels)?


Press Release - Reliable Software Technologies, Ada-Europe 2018

Started by Dirk Craeynest in comp.arch.embedded1 month ago

----------------------------------------------------------------------- FINAL Call for Participation ...

----------------------------------------------------------------------- FINAL Call for Participation *** UPDATED Program Summary *** 23rd International Conference on Reliable Software Technologies - Ada-Europe 2018 18-22 June 2018, Lisbon, Portugal ...


Use of soft float?

Started by Philipp Klaus Krause in comp.arch.embedded1 month ago 13 replies

While those who make heavy use of floating-point computations in embedded sytems probably go for systems with hardware support...

While those who make heavy use of floating-point computations in embedded sytems probably go for systems with hardware support for floating-point calculations, there are plenty of systems without such support out there. And the existence of soft float implementations indicates that there is a real need for doing floating-point computations on systems without hardware floating-point support. ...


Guest Webinar: Heterogeneous Multiprocessing with Android on NXP i.MX 7

Started by Matthew Do in comp.arch.embedded1 month ago

Asymmetric multiprocessing (AMP) systems fulfill the need for high performances and real-time by combining the responsiveness of a MCU (Cortex-M)...

Asymmetric multiprocessing (AMP) systems fulfill the need for high performances and real-time by combining the responsiveness of a MCU (Cortex-M) with the processing power of an application processor which runs a full OS. This webinar presents a technical overview on asymmetric multiprocessing and its implementation on an NXP i.MX 7 Colibri System on Module running Android on the MPU (Cortex-A,...


Wear-leveling and Journaling file system for NOR flash?

Started by Dave Nadler in comp.arch.embedded1 month ago 3 replies

What are folks using for reliable file system on for example SST26VF064B 64Mbit SQI flash? Naive FAT will quickly wear out device for some...

What are folks using for reliable file system on for example SST26VF064B 64Mbit SQI flash? Naive FAT will quickly wear out device for some uses; needs a wear-leveling file system. Needs to be power-off safe as well; no corrupted file system from arbitrarily-timed power cut. Anybody? Thanks, Best Regards, Dave PS: A customer of ours used TINY by HCC some years back. It is unfortunately ...


Cypress PSOC 6

Started by Anonymous in comp.arch.embedded2 months ago 3 replies

It has been a while since I looked at anything Cypress. I have a couple of PSOC something sticks that were fun to play with a bit, but I never...

It has been a while since I looked at anything Cypress. I have a couple of PSOC something sticks that were fun to play with a bit, but I never used the CPU for a project. Now they have come out with a PSOC 6 with asymmetric dual processors, and M4 and a M0+ with an optional BLE radio and stack. Looks like they are using the M0+ to control the BLE and the M4 is for user code. I t


Re: RE: RTD Interface chip needed

Started by "Dwa...@planet.eon.net [piclist]" in Piclist2 months ago

Hi there, Dennis. Haven't heard from you for a while! Most PIClisters spend their time at the PIClist mailing list maintained at MIT. You...

Hi there, Dennis. Haven't heard from you for a while! Most PIClisters spend their time at the PIClist mailing list maintained at MIT. You can head over to for instructions on how to join that list. An awful lot of people also spend time at . This is a great question and answer site but they don't allow idle chit-chat. Thus:


Re: RE: RTD Interface chip needed

Started by "Kee...@yahoo.com [piclist]" in Piclist2 months ago

Well, you're the first one to post a message in 4 years.... :) Grtz, Knalkeez

Well, you're the first one to post a message in 4 years.... :) Grtz, Knalkeez


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