> But I have a further question. > > I configure the FIFO as quad-buffered. All buffers are full of data. How > long takes is till the FIFO is rewritable. Does it last several CLK > cycles?A buffer becomes available once the USB host has read a packet - see page 124 of the TRM. Andrew
Cypress FX2 buffering
Started by ●September 19, 2010
Reply by ●September 23, 20102010-09-23