Digital Crystal Oscillator

Albert van der Horst wrote:
> In article <4NWdnWqxetTu24XQnZ2dnUVZ_rednZ2d@web-ster.com>,
> Tim Wescott  <tim@seemywebsite.com> wrote:
>> On Sun, 26 Dec 2010 20:46:26 -0800, rickman wrote:
>>
>>> I've read the Green Arrays web page app note on using a pin to turn a
>>> crystal into an oscillator at
>>>
>>> http://www.greenarrays.com/home/documents/pub/AP002-OSC.html
>>>
>>> Although the work they did seems to work well enough, they stopped
>>> working on the project a long way short of having an actual oscillator.
>>> I've been trying to run a spice simulation to explore this concept and
>>> finding that an oscillator is not so easy to design... as I already
>>> knew.
>>>
>>> Has anyone designed what I would call a digital crystal oscillator
>>> before?  Using Google I didn't find anything that actually uses digital
>>> logic, or in this case software to act as the amplifier of a crystal
>>> oscillator.  Many designs use an inverter as an amplifier, either from a
>>> digital logic chip or contained within a digital chip like a MCU.  But I
>>> can't seem to find any mention of an oscillator that uses a "kick" from
>>> a truly digital controller.
>>>
>>> From the simulations I have done, I am finding it hard to create just
>>> the right conditions to make this idea work.  Anyone know anything about
>>> how to make a crystal oscillate using a digital drive controller?
>> Either they never got it working, or they suddenly realized in all their
>> babbling about "making extra components do their work" that they were
>> replacing --> one stinking transistor <-- with a bazzilion of them.
>>
>>From the general tone of the article, either they don't know what the
>> heck they're doing, or they're _really_ talking down to the audience.
>> Their surprise at needing to give a crystal -- famous for being a Really
>> High Q Device -- lots of cycles of excitation before they see an output
>> tends to indicate happy ignorance rather than arrogant competence.
> 
> You seem to understand crystals way better than I do.
> So I have a few questions below.
> 
>> If they were driving the pin directly into the crystal at its series
>> resonant frequency they were probably way over-exciting it.
> 
> They try to get as near as possible to the resonant frequency
> by a software loop, with 2.5 nS resolution for the period.
> As you can see, they force the power voltage with a low impedance
> directly on the crystal. This is 1.8 V but anyway, 32 kHz crystals
> are large and robust (?)
> 

1uW is the typical recommended limit for them.


> Now do you understand what happens here?
> They impose a 1.8 V square wave of 32 Khz resonance directly on the
> crystal for slightly more than half a second.
> Then they stand back, high impedance mode. Then the voltage
> over the crystal builds up taking another 500 mS, before dying out.
> The top-top value of this is more than the 1.8V they put in.
> (They use a 10 pF scope probe, which is the same order of
> capacitance as the crystal's parasitic capacitance, which is another
> thing I understand not enough to take into account.)
> 

2.5nsec resolution is 2.7Hz off for that 32.768kHz watch crystal. Quite
a lot. I wonder if they ever held a spectrum analyzer to that. Maybe
Niagara Falls has a better noise performance? ... :-)

You can't use a regular scope probe to measure this stuff. The minimum
effort should be a FET probe with not much more than 1pF.


>> Making a single-pin crystal oscillator is probably doable.  Particularly
>> if you're willing to go for the crystal's parallel resonance mode, you
>> should be able to set up a pure negative resistance at a pin, turn it on,
>> and stand back.  Figuring out the complications is, of course, left as an
>> exercise to the reader.
> 
> This is not just a single pin oscillator. This is one hanging off
> a digital output. The rule of the game is to drive at power line
> voltages only. You can only pick the moment.
> 
> P.S. the GA 144 has a minimum of resistive elements, because
> "dissipation wastes energy" as the inventor says.
> This is another experiment in this direction. It may be a hobby horse.
> 

All devices in a chip are resistors, nothing you can do about that.
Resistors aren't the major energy wasters, usually. Quiescent currents
in analog stuff are. So are leakage in push-pull stages and losses due
to constant swinging around of inputs. Capacitances that must be driven
by N/P channel devices with finite conductivity.

-- 
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.

Tim Wescott wrote:
> On 01/03/2011 10:30 AM, Albert van der Horst wrote:

[...]

>> They impose a 1.8 V square wave of 32 Khz resonance directly on the
>> crystal for slightly more than half a second.
>> Then they stand back, high impedance mode. Then the voltage
>> over the crystal builds up taking another 500 mS, before dying out.
>> The top-top value of this is more than the 1.8V they put in.
>> (They use a 10 pF scope probe, which is the same order of
>> capacitance as the crystal's parasitic capacitance, which is another
>> thing I understand not enough to take into account.)
> 
> So once they've finished dinking around in the lab and they're ready to
> make this thing _sustain_ oscillations, what do they do?
> 
> After I wrote the above it did occur to me that you could hit the thing
> briefly with excitation, then back off for a while and let it ring, then
> hit it, etc.  You could keep the excitation down to a manageable level,
> that way.
> 

If the time step resolution is really 2.5nsec that would result in some
serious phase noise. Also, if you regulary have to "goose it" how would
they maintain longterm accuracy? Dithering like on DFLs in modern uC?

[...]

-- 
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.

On 01/03/2011 11:07 AM, Joerg wrote:
> Tim Wescott wrote:
>> On 01/03/2011 10:30 AM, Albert van der Horst wrote:
>
> [...]
>
>>> They impose a 1.8 V square wave of 32 Khz resonance directly on the
>>> crystal for slightly more than half a second.
>>> Then they stand back, high impedance mode. Then the voltage
>>> over the crystal builds up taking another 500 mS, before dying out.
>>> The top-top value of this is more than the 1.8V they put in.
>>> (They use a 10 pF scope probe, which is the same order of
>>> capacitance as the crystal's parasitic capacitance, which is another
>>> thing I understand not enough to take into account.)
>>
>> So once they've finished dinking around in the lab and they're ready to
>> make this thing _sustain_ oscillations, what do they do?
>>
>> After I wrote the above it did occur to me that you could hit the thing
>> briefly with excitation, then back off for a while and let it ring, then
>> hit it, etc.  You could keep the excitation down to a manageable level,
>> that way.
>>
>
> If the time step resolution is really 2.5nsec that would result in some
> serious phase noise. Also, if you regulary have to "goose it" how would
> they maintain longterm accuracy? Dithering like on DFLs in modern uC?

I think you'd have to dither the excitation frequency, yes.  Actually, 
if you're letting the crystal control the excitation frequency with some 
sort of a PLL you _would_ dither the excitation frequency; it's just a 
question of how _well_ you dither the excitation frequency, and whether 
you do it purposely or just let the loop make it happen.

I'd have to do some analysis first, but I suspect that a 1st-order 
delta-sigma modulator would work pretty well -- like this: 
http://www.eetimes.com/design/embedded/4006431/Sigma-delta-techniques-extend-DAC-resolution 
(http://tinyurl.com/23xuzxq).  The big question is that if you're phase 
locking an RC clock, is it going to vary enough that external dither 
will make a difference, or not?

-- 

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" was written for you.
See details at http://www.wescottdesign.com/actfes/actfes.html

On Jan 3, 2:03 pm, Joerg <inva...@invalid.invalid> wrote:
> Albert van der Horst wrote:
>
>
>
> > In article <4NWdnWqxetTu24XQnZ2dnUVZ_redn...@web-ster.com>,
> > Tim Wescott  <t...@seemywebsite.com> wrote:
> >> On Sun, 26 Dec 2010 20:46:26 -0800, rickman wrote:
>
> >>> I've read the Green Arrays web page app note on using a pin to turn a
> >>> crystal into an oscillator at
>
> >>>http://www.greenarrays.com/home/documents/pub/AP002-OSC.html
>
> >>> Although the work they did seems to work well enough, they stopped
> >>> working on the project a long way short of having an actual oscillator.
> >>> I've been trying to run a spice simulation to explore this concept and
> >>> finding that an oscillator is not so easy to design... as I already
> >>> knew.
>
> >>> Has anyone designed what I would call a digital crystal oscillator
> >>> before?  Using Google I didn't find anything that actually uses digital
> >>> logic, or in this case software to act as the amplifier of a crystal
> >>> oscillator.  Many designs use an inverter as an amplifier, either from a
> >>> digital logic chip or contained within a digital chip like a MCU.  But I
> >>> can't seem to find any mention of an oscillator that uses a "kick" from
> >>> a truly digital controller.
>
> >>> From the simulations I have done, I am finding it hard to create just
> >>> the right conditions to make this idea work.  Anyone know anything about
> >>> how to make a crystal oscillate using a digital drive controller?
> >> Either they never got it working, or they suddenly realized in all their
> >> babbling about "making extra components do their work" that they were
> >> replacing --> one stinking transistor <-- with a bazzilion of them.
>
> >>From the general tone of the article, either they don't know what the
> >> heck they're doing, or they're _really_ talking down to the audience.
> >> Their surprise at needing to give a crystal -- famous for being a Really
> >> High Q Device -- lots of cycles of excitation before they see an output
> >> tends to indicate happy ignorance rather than arrogant competence.
>
> > You seem to understand crystals way better than I do.
> > So I have a few questions below.
>
> >> If they were driving the pin directly into the crystal at its series
> >> resonant frequency they were probably way over-exciting it.
>
> > They try to get as near as possible to the resonant frequency
> > by a software loop, with 2.5 nS resolution for the period.
> > As you can see, they force the power voltage with a low impedance
> > directly on the crystal. This is 1.8 V but anyway, 32 kHz crystals
> > are large and robust (?)
>
> 1uW is the typical recommended limit for them.
>
> > Now do you understand what happens here?
> > They impose a 1.8 V square wave of 32 Khz resonance directly on the
> > crystal for slightly more than half a second.
> > Then they stand back, high impedance mode. Then the voltage
> > over the crystal builds up taking another 500 mS, before dying out.
> > The top-top value of this is more than the 1.8V they put in.
> > (They use a 10 pF scope probe, which is the same order of
> > capacitance as the crystal's parasitic capacitance, which is another
> > thing I understand not enough to take into account.)
>
> 2.5nsec resolution is 2.7Hz off for that 32.768kHz watch crystal. Quite
> a lot. I wonder if they ever held a spectrum analyzer to that. Maybe
> Niagara Falls has a better noise performance? ... :-)
>
> You can't use a regular scope probe to measure this stuff. The minimum
> effort should be a FET probe with not much more than 1pF.
>
> >> Making a single-pin crystal oscillator is probably doable.  Particularly
> >> if you're willing to go for the crystal's parallel resonance mode, you
> >> should be able to set up a pure negative resistance at a pin, turn it on,
> >> and stand back.  Figuring out the complications is, of course, left as an
> >> exercise to the reader.
>
> > This is not just a single pin oscillator. This is one hanging off
> > a digital output. The rule of the game is to drive at power line
> > voltages only. You can only pick the moment.
>
> > P.S. the GA 144 has a minimum of resistive elements, because
> > "dissipation wastes energy" as the inventor says.
> > This is another experiment in this direction. It may be a hobby horse.
>
> All devices in a chip are resistors, nothing you can do about that.
> Resistors aren't the major energy wasters, usually. Quiescent currents
> in analog stuff are. So are leakage in push-pull stages and losses due
> to constant swinging around of inputs. Capacitances that must be driven
> by N/P channel devices with finite conductivity.
>
> --
> Regards, Joerg
>
> http://www.analogconsultants.com/
>
> "gmail" domain blocked because of excessive spam.
> Use another domain or send PM.

Did you read the article?  I think you may have missed the basic
concept of what they are looking to do.  The concept is that a
sustained square wave of close to the resonant frequency would be used
to initially excite the crystal and get it resonating.  This is the
part they tested.  Using a software loop with 2.5 ns resolution they
excited the crystal and set it oscillating.  Then they turned off the
output and watched the crystal with the scope.

The rest of the story which they outline, but do not test is to use
the input threshold to detect the oscillations and to control the
timing of the "spur", a brief as possible pulse to maintain the
oscillations.  This is not regulated by a separate clock.  The
processor is async and is in wait mode.  When the crystal voltage
crosses the threshold of the input, the process is triggered out of
wait and it generates the "spur" to maintain the excitation of the
crystal.

The author lists the remaining steps to complete the design.

To be continued...

    * Using the chip as a very high impedance active probe
    * Automating the crystal start-up
    * Keeping it running
    * Energy estimation and measurement
    * Comparison with other implentations [sic]
    * Ceramic resonator
    * External R-C network

I have been running some simulations on this idea and found that a
single pin oscillator likely won't work.  To drive the crystal, pulses
both positive and negative (ground) must be used to keep the crystal
voltage within the range of Vdd and Vss.  If the input threshold is
not well centered in this range, the magnitude of the two pulses will
not be equal pushing the bias of the crystal in the opposite direction
of the threshold.  The end result is that the crystal voltage will
either exceed the power supply range and start being clipped by the
protection diodes or the crystal voltage will not swing enough to
cross the input threshold on every cycle and oscillations will stop.
By using more than one pin, separate input and output, I am able to
make the simulation work well with a range of crystal frequencies.
But the design quickly becomes more complex than what is described in
Application Note 2.  I'm actually a bit disappointed that they didn't
pursue this effort a bit more and determine if their idea was actually
practical or not.

Rick

Tim Wescott wrote:
> On 01/03/2011 11:07 AM, Joerg wrote:
>> Tim Wescott wrote:
>>> On 01/03/2011 10:30 AM, Albert van der Horst wrote:
>>
>> [...]
>>
>>>> They impose a 1.8 V square wave of 32 Khz resonance directly on the
>>>> crystal for slightly more than half a second.
>>>> Then they stand back, high impedance mode. Then the voltage
>>>> over the crystal builds up taking another 500 mS, before dying out.
>>>> The top-top value of this is more than the 1.8V they put in.
>>>> (They use a 10 pF scope probe, which is the same order of
>>>> capacitance as the crystal's parasitic capacitance, which is another
>>>> thing I understand not enough to take into account.)
>>>
>>> So once they've finished dinking around in the lab and they're ready to
>>> make this thing _sustain_ oscillations, what do they do?
>>>
>>> After I wrote the above it did occur to me that you could hit the thing
>>> briefly with excitation, then back off for a while and let it ring, then
>>> hit it, etc.  You could keep the excitation down to a manageable level,
>>> that way.
>>>
>>
>> If the time step resolution is really 2.5nsec that would result in some
>> serious phase noise. Also, if you regulary have to "goose it" how would
>> they maintain longterm accuracy? Dithering like on DFLs in modern uC?
> 
> I think you'd have to dither the excitation frequency, yes.  Actually,
> if you're letting the crystal control the excitation frequency with some
> sort of a PLL you _would_ dither the excitation frequency; it's just a
> question of how _well_ you dither the excitation frequency, and whether
> you do it purposely or just let the loop make it happen.
> 
> I'd have to do some analysis first, but I suspect that a 1st-order
> delta-sigma modulator would work pretty well -- like this:
> http://www.eetimes.com/design/embedded/4006431/Sigma-delta-techniques-extend-DAC-resolution


Nice write-up.


> (http://tinyurl.com/23xuzxq).  The big question is that if you're phase
> locking an RC clock, is it going to vary enough that external dither
> will make a difference, or not?
> 

But isn't it that they shun resistors? Then all they'd have is a dither
of the "gooser signal" and if that's quantized to 2.5nsec time slivers
they'll run up to a hard limit. IIUC the purpose is to coax the external
crystal into resonating for as long a time possible. Almost like trying
to make the champagne glasses on the shelf "sing" with just the right
blast from a trumpet :-)

-- 
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.

On Jan 3, 2:25 pm, Tim Wescott <t...@seemywebsite.com> wrote:
> On 01/03/2011 11:07 AM, Joerg wrote:
>
>
>
> > Tim Wescott wrote:
> >> On 01/03/2011 10:30 AM, Albert van der Horst wrote:
>
> > [...]
>
> >>> They impose a 1.8 V square wave of 32 Khz resonance directly on the
> >>> crystal for slightly more than half a second.
> >>> Then they stand back, high impedance mode. Then the voltage
> >>> over the crystal builds up taking another 500 mS, before dying out.
> >>> The top-top value of this is more than the 1.8V they put in.
> >>> (They use a 10 pF scope probe, which is the same order of
> >>> capacitance as the crystal's parasitic capacitance, which is another
> >>> thing I understand not enough to take into account.)
>
> >> So once they've finished dinking around in the lab and they're ready to
> >> make this thing _sustain_ oscillations, what do they do?
>
> >> After I wrote the above it did occur to me that you could hit the thing
> >> briefly with excitation, then back off for a while and let it ring, then
> >> hit it, etc.  You could keep the excitation down to a manageable level,
> >> that way.
>
> > If the time step resolution is really 2.5nsec that would result in some
> > serious phase noise. Also, if you regulary have to "goose it" how would
> > they maintain longterm accuracy? Dithering like on DFLs in modern uC?
>
> I think you'd have to dither the excitation frequency, yes.  Actually,
> if you're letting the crystal control the excitation frequency with some
> sort of a PLL you _would_ dither the excitation frequency; it's just a
> question of how _well_ you dither the excitation frequency, and whether
> you do it purposely or just let the loop make it happen.
>
> I'd have to do some analysis first, but I suspect that a 1st-order
> delta-sigma modulator would work pretty well -- like this:http://www.eetimes.com/design/embedded/4006431/Sigma-delta-techniques...
> (http://tinyurl.com/23xuzxq).  The big question is that if you're phase
> locking an RC clock, is it going to vary enough that external dither
> will make a difference, or not?


I'm not sure what you are talking about here.  The idea is that once
the crystal is resonating, the processor monitors the input threshold
crossings to control the "goose" or "spur".  I suppose there are any
number of ways to do that.  I was thinking that you would spur the
crystal for a minimum amount of time in the appropriate direction each
time the input threshold is crossed.

I don't think the app note author was thinking of something like a
sigma-delta based drive.  That would take a lot of compute resources
and one of the goals of this design is to use as little power as
possible.  Spurring the crystal on the threshold crossings would use
on the order of 50 uW in the processor which is a pretty good number
for a 1 MHz oscillator.

As to the dithering, once the crystal is ringing, you don't need to
dither anything.  The crystal sets the timing and the processor just
responds to that timing.  The processor is asynch so there is no clock
to dither.

Rick

On 01/03/2011 12:28 PM, Joerg wrote:
> Tim Wescott wrote:
>> On 01/03/2011 11:07 AM, Joerg wrote:
>>> Tim Wescott wrote:
>>>> On 01/03/2011 10:30 AM, Albert van der Horst wrote:
>>>
>>> [...]
>>>
>>>>> They impose a 1.8 V square wave of 32 Khz resonance directly on the
>>>>> crystal for slightly more than half a second.
>>>>> Then they stand back, high impedance mode. Then the voltage
>>>>> over the crystal builds up taking another 500 mS, before dying out.
>>>>> The top-top value of this is more than the 1.8V they put in.
>>>>> (They use a 10 pF scope probe, which is the same order of
>>>>> capacitance as the crystal's parasitic capacitance, which is another
>>>>> thing I understand not enough to take into account.)
>>>>
>>>> So once they've finished dinking around in the lab and they're ready to
>>>> make this thing _sustain_ oscillations, what do they do?
>>>>
>>>> After I wrote the above it did occur to me that you could hit the thing
>>>> briefly with excitation, then back off for a while and let it ring, then
>>>> hit it, etc.  You could keep the excitation down to a manageable level,
>>>> that way.
>>>>
>>>
>>> If the time step resolution is really 2.5nsec that would result in some
>>> serious phase noise. Also, if you regulary have to "goose it" how would
>>> they maintain longterm accuracy? Dithering like on DFLs in modern uC?
>>
>> I think you'd have to dither the excitation frequency, yes.  Actually,
>> if you're letting the crystal control the excitation frequency with some
>> sort of a PLL you _would_ dither the excitation frequency; it's just a
>> question of how _well_ you dither the excitation frequency, and whether
>> you do it purposely or just let the loop make it happen.
>>
>> I'd have to do some analysis first, but I suspect that a 1st-order
>> delta-sigma modulator would work pretty well -- like this:
>> http://www.eetimes.com/design/embedded/4006431/Sigma-delta-techniques-extend-DAC-resolution
>
>
> Nice write-up.
>
>
>> (http://tinyurl.com/23xuzxq).  The big question is that if you're phase
>> locking an RC clock, is it going to vary enough that external dither
>> will make a difference, or not?
>>
>
> But isn't it that they shun resistors? Then all they'd have is a dither
> of the "gooser signal" and if that's quantized to 2.5nsec time slivers
> they'll run up to a hard limit. IIUC the purpose is to coax the external
> crystal into resonating for as long a time possible. Almost like trying
> to make the champagne glasses on the shelf "sing" with just the right
> blast from a trumpet :-)

I got the impression that the chip is run off of an RC clock, or other 
"Q-less" multivibrator.

Whatever their main clock is, it can't have crystal stability or they 
wouldn't need a crystal.

-- 

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" was written for you.
See details at http://www.wescottdesign.com/actfes/actfes.html

On 01/03/2011 12:44 PM, rickman wrote:
> On Jan 3, 2:25 pm, Tim Wescott<t...@seemywebsite.com>  wrote:
>> On 01/03/2011 11:07 AM, Joerg wrote:
>>
>>
>>
>>> Tim Wescott wrote:
>>>> On 01/03/2011 10:30 AM, Albert van der Horst wrote:
>>
>>> [...]
>>
>>>>> They impose a 1.8 V square wave of 32 Khz resonance directly on the
>>>>> crystal for slightly more than half a second.
>>>>> Then they stand back, high impedance mode. Then the voltage
>>>>> over the crystal builds up taking another 500 mS, before dying out.
>>>>> The top-top value of this is more than the 1.8V they put in.
>>>>> (They use a 10 pF scope probe, which is the same order of
>>>>> capacitance as the crystal's parasitic capacitance, which is another
>>>>> thing I understand not enough to take into account.)
>>
>>>> So once they've finished dinking around in the lab and they're ready to
>>>> make this thing _sustain_ oscillations, what do they do?
>>
>>>> After I wrote the above it did occur to me that you could hit the thing
>>>> briefly with excitation, then back off for a while and let it ring, then
>>>> hit it, etc.  You could keep the excitation down to a manageable level,
>>>> that way.
>>
>>> If the time step resolution is really 2.5nsec that would result in some
>>> serious phase noise. Also, if you regulary have to "goose it" how would
>>> they maintain longterm accuracy? Dithering like on DFLs in modern uC?
>>
>> I think you'd have to dither the excitation frequency, yes.  Actually,
>> if you're letting the crystal control the excitation frequency with some
>> sort of a PLL you _would_ dither the excitation frequency; it's just a
>> question of how _well_ you dither the excitation frequency, and whether
>> you do it purposely or just let the loop make it happen.
>>
>> I'd have to do some analysis first, but I suspect that a 1st-order
>> delta-sigma modulator would work pretty well -- like this:http://www.eetimes.com/design/embedded/4006431/Sigma-delta-techniques...
>> (http://tinyurl.com/23xuzxq).  The big question is that if you're phase
>> locking an RC clock, is it going to vary enough that external dither
>> will make a difference, or not?
>
>
> I'm not sure what you are talking about here.  The idea is that once
> the crystal is resonating, the processor monitors the input threshold
> crossings to control the "goose" or "spur".  I suppose there are any
> number of ways to do that.  I was thinking that you would spur the
> crystal for a minimum amount of time in the appropriate direction each
> time the input threshold is crossed.

That may work, that may not.

The author's idea is that he's a hot-shit rocket scientist because he 
can get a crystal to ring but can't keep an oscillation going.  All he 
says about specifics is:

"Now that we know it will be feasible to start the crystal under program 
control regardless of the variables affecting our timing, we need to 
develop and test that program and then to implement the code for 
replenishing the energy of the crystal so it will oscillate 
indefinitely. Along the way we will be seeking ways to minimize the 
energy consumed in both starting and sustaining the oscillation. "

IOW: he hasn't figured it out yet.  So where does he say how he's going 
to give it a kick, and where's his demonstration that his intended 
scheme works?

> I don't think the app note author was thinking of something like a
> sigma-delta based drive.

I don't think the app note author's thinking was based on much knowledge 
of crystals at all, so I don't feel like I have to put much weight on 
whatever confused and uninformed thinking was going on.

 > That would take a lot of compute resources

If you read the article I cited, you'll see that a 1st-order sigma delta 
can be implemented with little more resources than a loop counter.  If 
that's "a lot of compute resources" then the computer is pretty lame, 
and it's a darn good argument for not having something so 
compute-intensive as the software loop that he's using.

> and one of the goals of this design is to use as little power as
> possible.

Which leads us right back to: why waste the thousands of transistors in 
the processor (and the energy it takes to make them switch states at 
400MHz or whatever) when we could use just one stinking little 
transistor, pulling very little current, to run the crystal?

It's a _watch crystal_.  This is the guy that, when it's in a 
wristwatch, can be kept running for well over a year by a battery that 
has maybe 0.1cc of active material in it.  For this we need to devote a 
_processor_???  Running at 400MHz???  How long is _that_ going to run on 
an itty bitty watch battery?

> Spurring the crystal on the threshold crossings would use
> on the order of 50 uW in the processor which is a pretty good number
> for a 1 MHz oscillator.

It's a 32kHz oscillator.  Get your facts straight.  And 50uW is a hell 
of a lot more drive than the crystal needs or can stand -- so where's 
the targeted "low power" dissipation?

> As to the dithering, once the crystal is ringing, you don't need to
> dither anything.  The crystal sets the timing and the processor just
> responds to that timing.  The processor is asynch so there is no clock
> to dither.

That depends on how you need to architect the loop.  If the derived 
timebase in the processor needs to coast at all well, you need 
dithering.  If you can get by with cycle-by-cycle corrections, then 
maybe you don't need _explicit_ dithering -- but you need dithering.  If 
you do cycle-by-cycle corrections, you can bet your sweet bippy that the 
frequency of the derived internal clock _will_ dither.  It'll quite 
probably dither more than if it's dithered internally in a controlled 
manner, and it'll certainly dither in a way that'll be more 
objectionable to most applications.

-- 

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" was written for you.
See details at http://www.wescottdesign.com/actfes/actfes.html

On 01/03/2011 12:21 PM, rickman wrote:
> On Jan 3, 2:03 pm, Joerg<inva...@invalid.invalid>  wrote:
>> Albert van der Horst wrote:
>>
>>
>>
>>> In article<4NWdnWqxetTu24XQnZ2dnUVZ_redn...@web-ster.com>,
>>> Tim Wescott<t...@seemywebsite.com>  wrote:
>>>> On Sun, 26 Dec 2010 20:46:26 -0800, rickman wrote:
>>
>>>>> I've read the Green Arrays web page app note on using a pin to turn a
>>>>> crystal into an oscillator at
>>
>>>>> http://www.greenarrays.com/home/documents/pub/AP002-OSC.html
>>
>>>>> Although the work they did seems to work well enough, they stopped
>>>>> working on the project a long way short of having an actual oscillator.
>>>>> I've been trying to run a spice simulation to explore this concept and
>>>>> finding that an oscillator is not so easy to design... as I already
>>>>> knew.
>>
>>>>> Has anyone designed what I would call a digital crystal oscillator
>>>>> before?  Using Google I didn't find anything that actually uses digital
>>>>> logic, or in this case software to act as the amplifier of a crystal
>>>>> oscillator.  Many designs use an inverter as an amplifier, either from a
>>>>> digital logic chip or contained within a digital chip like a MCU.  But I
>>>>> can't seem to find any mention of an oscillator that uses a "kick" from
>>>>> a truly digital controller.
>>
>>>>>  From the simulations I have done, I am finding it hard to create just
>>>>> the right conditions to make this idea work.  Anyone know anything about
>>>>> how to make a crystal oscillate using a digital drive controller?
>>>> Either they never got it working, or they suddenly realized in all their
>>>> babbling about "making extra components do their work" that they were
>>>> replacing -->  one stinking transistor<-- with a bazzilion of them.
>>
>>> > From the general tone of the article, either they don't know what the
>>>> heck they're doing, or they're _really_ talking down to the audience.
>>>> Their surprise at needing to give a crystal -- famous for being a Really
>>>> High Q Device -- lots of cycles of excitation before they see an output
>>>> tends to indicate happy ignorance rather than arrogant competence.
>>
>>> You seem to understand crystals way better than I do.
>>> So I have a few questions below.
>>
>>>> If they were driving the pin directly into the crystal at its series
>>>> resonant frequency they were probably way over-exciting it.
>>
>>> They try to get as near as possible to the resonant frequency
>>> by a software loop, with 2.5 nS resolution for the period.
>>> As you can see, they force the power voltage with a low impedance
>>> directly on the crystal. This is 1.8 V but anyway, 32 kHz crystals
>>> are large and robust (?)
>>
>> 1uW is the typical recommended limit for them.
>>
>>> Now do you understand what happens here?
>>> They impose a 1.8 V square wave of 32 Khz resonance directly on the
>>> crystal for slightly more than half a second.
>>> Then they stand back, high impedance mode. Then the voltage
>>> over the crystal builds up taking another 500 mS, before dying out.
>>> The top-top value of this is more than the 1.8V they put in.
>>> (They use a 10 pF scope probe, which is the same order of
>>> capacitance as the crystal's parasitic capacitance, which is another
>>> thing I understand not enough to take into account.)
>>
>> 2.5nsec resolution is 2.7Hz off for that 32.768kHz watch crystal. Quite
>> a lot. I wonder if they ever held a spectrum analyzer to that. Maybe
>> Niagara Falls has a better noise performance? ... :-)
>>
>> You can't use a regular scope probe to measure this stuff. The minimum
>> effort should be a FET probe with not much more than 1pF.
>>
>>>> Making a single-pin crystal oscillator is probably doable.  Particularly
>>>> if you're willing to go for the crystal's parallel resonance mode, you
>>>> should be able to set up a pure negative resistance at a pin, turn it on,
>>>> and stand back.  Figuring out the complications is, of course, left as an
>>>> exercise to the reader.
>>
>>> This is not just a single pin oscillator. This is one hanging off
>>> a digital output. The rule of the game is to drive at power line
>>> voltages only. You can only pick the moment.
>>
>>> P.S. the GA 144 has a minimum of resistive elements, because
>>> "dissipation wastes energy" as the inventor says.
>>> This is another experiment in this direction. It may be a hobby horse.
>>
>> All devices in a chip are resistors, nothing you can do about that.
>> Resistors aren't the major energy wasters, usually. Quiescent currents
>> in analog stuff are. So are leakage in push-pull stages and losses due
>> to constant swinging around of inputs. Capacitances that must be driven
>> by N/P channel devices with finite conductivity.
>>
>> --
>> Regards, Joerg
>>
>> http://www.analogconsultants.com/
>>
>> "gmail" domain blocked because of excessive spam.
>> Use another domain or send PM.
>
> Did you read the article?  I think you may have missed the basic
> concept of what they are looking to do.  The concept is that a
> sustained square wave of close to the resonant frequency would be used
> to initially excite the crystal and get it resonating.  This is the
> part they tested.  Using a software loop with 2.5 ns resolution they
> excited the crystal and set it oscillating.  Then they turned off the
> output and watched the crystal with the scope.
>
> The rest of the story which they outline, but do not test is to use
> the input threshold to detect the oscillations and to control the
> timing of the "spur", a brief as possible pulse to maintain the
> oscillations.  This is not regulated by a separate clock.  The
> processor is async and is in wait mode.  When the crystal voltage
> crosses the threshold of the input, the process is triggered out of
> wait and it generates the "spur" to maintain the excitation of the
> crystal.
>
> The author lists the remaining steps to complete the design.
>
> To be continued...
>
>      * Using the chip as a very high impedance active probe
>      * Automating the crystal start-up
>      * Keeping it running
>      * Energy estimation and measurement
>      * Comparison with other implentations [sic]
>      * Ceramic resonator
>      * External R-C network
>
> I have been running some simulations on this idea and found that a
> single pin oscillator likely won't work.

You have run some simulations and found that you are not smart enough, 
or determined enough, to make a single pin oscillator work.

There is no theoretical reason that I can see that would prevent an 
oscillator of this architecture from working.  I'm not questioning its 
feasibility, just its practicality.

> To drive the crystal, pulses
> both positive and negative (ground) must be used to keep the crystal
> voltage within the range of Vdd and Vss.  If the input threshold is
> not well centered in this range, the magnitude of the two pulses will
> not be equal pushing the bias of the crystal in the opposite direction
> of the threshold.

How can that possibly be?  If indeed you do this by generating a narrow 
pulse at each sensed crossing (which may or may not work), then you will 
perforce have to generate as many "pull to Vss" pulses as "pull to Vdd" 
pulses.  All you have to do is control the pulse width so that they are 
equal, and -- voila! -- the DC content of the signal is centered on Vdd/2.

> The end result is that the crystal voltage will
> either exceed the power supply range and start being clipped by the
> protection diodes or the crystal voltage will not swing enough to
> cross the input threshold on every cycle and oscillations will stop.

How did you determine this?  Did you turn off the computer for long 
enough to get out some paper and a pencil and go through the theoretical 
calculations?

> By using more than one pin, separate input and output, I am able to
> make the simulation work well with a range of crystal frequencies.
> But the design quickly becomes more complex than what is described in
> Application Note 2.  I'm actually a bit disappointed that they didn't
> pursue this effort a bit more and determine if their idea was actually
> practical or not.
>
> Rick


-- 

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com

Do you need to implement control loops in software?
"Applied Control Theory for Embedded Systems" was written for you.
See details at http://www.wescottdesign.com/actfes/actfes.html

On Jan 3, 11:07 am, Joerg <inva...@invalid.invalid> wrote:
> If the time step resolution is really 2.5nsec that would result in some
> serious phase noise. Also, if you regulary have to "goose it" how would
> they maintain longterm accuracy?

From what I read the issue I see is that they had to measure the
thing very accurately to get the initial pumping frequency close
enough to pump it into resonating with enough amplitude that
the micro could see it.  If it starts with a more crude estimate of
that timing and varies it slowly until the micro can see the
xtal oscillate the first stage might work better.  I would be inclined
to
pump it a little differently to get it to that stage.

The big issue is indeed that when a timing loop has 2ns increments
and a poll loop has 7ns increments on a penny-processor-and-pin
it would introduce terrible timing jitter on each xtal cycle and
likely very
serious timing drift over time.   If the pumping gets out of phase
the
xtal will stop oscillating.

I think once an xtal is oscillating it needs to get right sized vcc
and
gnd pulse on each cycle or over a period of cycles if 2ns precision
on the pulse timing for one cycle is not precise enough.

It needs to sync up on each cycle more accurately than can be
done with a poll loop or interrupt.  That's where I would see it
using the pin wake feature.

This would let it sync up on each cycle with a couple of
picoseconds of jitter and a couple of hundred ps of latency.
It is when you need that sort of timing that you need to add
the external xtal and traces.

Different pin wake circuit design might change to a different
version which would effect code.  But the code for what
I would write should be shorter than the english
description of it above and it should only take a few
minutes to test.

A more sophisticated version in an application might
put a watchdog somewhere else to monitor the modulation
phase of the xtal and do the right thing to get the
driver node to recover should it fail.  If one uses only pin
wake to get jitter down to a few picoseconds it means that
if the xtal quits ringing then that processor would sleep
forever.

So to guard against that it could use a multiport read
rather than just a pin port read.  Then if the watchdog
detects if the xtal is about to go away or that it has gone
away it can do the appropriate thing for recovery.

A more sophisticated version still might use a
D/A or A/D or add software to measure temperature
and fine tune things further. A GA144 has more than eighty
pins but only six analog pins.  A GA4 has eight or twelve
pins with only two of them are analog.  It is still a fraction
of a cent of hardware but there are fewer of them available than
gpio pins or gpio pins with the pin wake feature.

I would think there should be many ways the
software could be coded to do the stuff I described
above could be written.  It should only take a few lines
of code.

I would think it possible to drive an xtal from both
ends with two pins using similar techniques or
simulate other external circuits.  I see the poll loop
vs pin wake synchronization issue to be at the
heart of the problem to getting phase locked to
a timing source through a gpio pin.

I might hook up an xtal and see how long it
takes to get a working solution in code.

Best Wishes