Delta-sigma ADC question

Hello,

I am looking for an ADC 16+ bit resolution that would sample 64 chanels
at the
rate of 25 Khz each. switching is planned to be done with a mux.

I have heard that the sigma delta ADCs are not appropriate for this
task

Questions are:

1.If indeed they are'nt ,can some one explain why?
2.if not can any one point a specific SD ADC that can stand they rates
mentioned.

Thanks in advace,
Marc.

In article <1113255980.248460.27760@o13g2000cwo.googlegroups.com>, 
marcsok@yahoo.com says...
> Hello,
> 
> I am looking for an ADC 16+ bit resolution that would sample 64 chanels
> at the
> rate of 25 Khz each. switching is planned to be done with a mux.
> 
> I have heard that the sigma delta ADCs are not appropriate for this
> task
> 
> Questions are:
> 
> 1.If indeed they are'nt ,can some one explain why?
> 2.if not can any one point a specific SD ADC that can stand they rates
> mentioned.

Delta sigma converters  generally require several times as long to
get a stable output when switching inputs with a multiplexer because
the internal digital filters require  settling time.

You are looking at collecting 64 x 25000 samples per second  or
1.6MSamples per second. Multiply that times 3 for the extra settling
time, and you're going to need a REALLY fast clock for the converter,
and a very fast multiplexer.

64 channels times 25KHz is a problem better suited to multiple
faster converters.  The RADAR, SONAR, and ultrasound folks might
have a solution, but it won't be cheap!

Mark Borgerson

soos wrote:
> Hello,
> 
> I am looking for an ADC 16+ bit resolution that would sample 64 chanels
> at the
> rate of 25 Khz each. switching is planned to be done with a mux.
> 
> I have heard that the sigma delta ADCs are not appropriate for this
> task
> 
> Questions are:
> 
> 1.If indeed they are'nt ,can some one explain why?
> 2.if not can any one point a specific SD ADC that can stand they rates
> mentioned.

  See www.TI.com for the fastest SD ADCs, and look at their settling 
times, to see how many channels you can MUX. You will likely need
a combination of ADC's and MUXs to hit the nodes/BW values above.
  More ADCs and fewer MUXs will also give better total performance,
as you want to have the ADC(s) as close to the signal source(s) as 
practical.
  If you want to pre-process ( to ease the downstream load ) look also 
at SiLabs C8051F064 family => uC + 1MSPS ADCs

soos wrote:
> Hello,
>
> I am looking for an ADC 16+ bit resolution that would sample 64
> chanels at the
> rate of 25 Khz each. switching is planned to be done with a mux.
>
> I have heard that the sigma delta ADCs are not appropriate for this
> task
>
> Questions are:
>
> 1.If indeed they are'nt ,can some one explain why?
> 2.if not can any one point a specific SD ADC that can stand they rates
> mentioned.
>

SD-ADCs have a latency(pipeline delay) because the conversion needs a couple 
of clock cycles to be finished. Look in the datasheet, usually 3 to 24 
samples are needed. You can multiplex the input, but then have to wait those 
cycles until a meaningful data is output. The problem with so many inputs 
will be that now the output data has to be really fast, in fact the rate 
would need to be 64 * 25k * delay. The AD10678 would be possible, with 11 
cycles delay you will need 17.6MHz clock, well below the 80MHz capability, 
but the price...
A much better decision would be a SAR-based converter, which do not have a 
pipeline delay. Maybe you could come along with one or two AD7655, which has 
already a 4:1 Input mux, so your analog switches are reduced. 2 channels are 
sampled simultaneously, which might be of importance for certain 
measurements.

> Thanks in advace,
> Marc.
welcome
-- 
ciao Ban
Bordighera, Italy 

soos wrote:
> 
> I am looking for an ADC 16+ bit resolution that would sample 64
> chanels at the rate of 25 Khz each. switching is planned to be
> done with a mux.
> 
> I have heard that the sigma delta ADCs are not appropriate for
> this task
> 
> Questions are:
> 
> 1.If indeed they are'nt ,can some one explain why?
> 2.if not can any one point a specific SD ADC that can stand they
>   rates mentioned.

Delta modulation generally follows changes in the input signal,
with significant limitations on the slew rate.  A mux implies
wholesale alteration in that value, and thus is not suitable in
front of delta modulation.

-- 
"If you want to post a followup via groups.google.com, don't use
 the broken "Reply" link at the bottom of the article.  Click on 
 "show options" at the top of the article, then click on the 
 "Reply" at the bottom of the article headers." - Keith Thompson

On 11 Apr 2005 14:46:20 -0700, "soos" <marcsok@yahoo.com> wrote:

>I am looking for an ADC 16+ bit resolution that would sample 64 chanels
>at the rate of 25 Khz each. switching is planned to be done with a mux.
>
>I have heard that the sigma delta ADCs are not appropriate for this task

In any sampled systems, the input spectrum must be limited to below
fs/2 in order to avoid aliases.

In SD ADCs, this bandwidth limitation is more or less inherent due to
the way the SD converter works and very little or no external low pass
filtering is required.

In a multiplexed system, the multiplexer becomes the sampler and the
low pass filtering has to be moved in front on the multiplexer and
implemented on _every_ input channel. Implementing 64 analog low pass
filters with precision resistors and capacitors or SCFs will also add
quite a lot to the system cost. 

With current low cost of SD ADCs, using 64 separate ADCs might be more
cost effective than using a super fast ADC, a multiplexer and signal
conditioning for all the 64 input channels.

Paul
      

Hi Mark,

Maybe you can enlighten me a bit here. Back in my old school/analog
days, I was taught that settling time is inversely proportional to
bandwidth. If I have a Fn Hz channel (from sampling at 2*Fn samples
per second), then why wouldn't the settling time of an input be the
same whether I used delta sigma or flash converter techniques?

I've heard this flavor of argument for years (decades?) against
using delta sigma converters in multi-channel systems. It must
be true - the folks who have used them would know (I have not). But
as I've just queried, there's something that doesn't seem to add up,
in my view. 

--RY



Mark Borgerson <mborgerson@comcast.net> writes:

> In article <1113255980.248460.27760@o13g2000cwo.googlegroups.com>, 
> marcsok@yahoo.com says...
> > Hello,
> > 
> > I am looking for an ADC 16+ bit resolution that would sample 64 chanels
> > at the
> > rate of 25 Khz each. switching is planned to be done with a mux.
> > 
> > I have heard that the sigma delta ADCs are not appropriate for this
> > task
> > 
> > Questions are:
> > 
> > 1.If indeed they are'nt ,can some one explain why?
> > 2.if not can any one point a specific SD ADC that can stand they rates
> > mentioned.
> 
> Delta sigma converters  generally require several times as long to
> get a stable output when switching inputs with a multiplexer because
> the internal digital filters require  settling time.
> 
> You are looking at collecting 64 x 25000 samples per second  or
> 1.6MSamples per second. Multiply that times 3 for the extra settling
> time, and you're going to need a REALLY fast clock for the converter,
> and a very fast multiplexer.
> 
> 64 channels times 25KHz is a problem better suited to multiple
> faster converters.  The RADAR, SONAR, and ultrasound folks might
> have a solution, but it won't be cheap!
> 
> Mark Borgerson
> 
> 

-- 
Randy Yates
Sony Ericsson Mobile Communications
Research Triangle Park, NC, USA
randy.yates@sonyericsson.com, 919-472-1124

In article <1113255980.248460.27760@o13g2000cwo.googlegroups.com>, soos wrote:
> Hello,
> 
> I am looking for an ADC 16+ bit resolution that would sample 64 chanels
> at the
> rate of 25 Khz each. switching is planned to be done with a mux.

It is rather difficult to find a sigma-delta ADC for that kind
of sampling frequency even for a single channel. Of course,
many inexpensive audio converters claim something like
"192 ks/s, 24 bits", but this is not the complete truth.

If you want to use such a converter in a multiplexed system,
you'll face the fact that the bandwith limitation (96 kHz)
effectively limits the settling time when multiplexing.

The worst case is when you have two multiplexed signals
which alternate between minimum and maximum. The square
wave produced this way has very significant high frequency
components. If you want to sample this signal down to
16 bits, the bandwidth has to be way larger than the multiplexing
frequency.

So, the first problem is the bandwidth-limiting nature of
sigma-delta converters. Other converter types (SAR, flash)
don't have this problem, their bandwidth may be much wider
than the sampling frequency (which in many cases is a problem
per se).

Another significant problem with sigma-delta converters
is their bad DC behaviour. The "el cheapo" audio converters
have rather impressive dynamic performance, but when it comes
to measuring DC levels, there may be hundreds of LSBs of
error and drift, as those parameters are insignificant in
audio processing.

There are fast DC-accurate sigma-deltas as well. For example,
the TI (BB) ADS1606 seems to offer 16 bits at 5 Ms/s and
2.45 MHz bandwidth. Oh, the price is $30 each, and you'd still
need many of these in parallel (check the data sheet to
get the idea of the settling time).

There are some less expensive converters with dozens of 
kilosamples per second. However, they could sample only one 
channel at a time, and the price is still well above
that of an inexpensive audio sigma-delta.

I'd recommend using the approach of one converter per channel.
This makes the sampling requirements much easier. If you want
to sample something at 64 x 25 kHz = 1.6 MHz at 16 bits, the
input impedance has to be low, but at 25 kHz there should be
no problems.

If you really want to multiplex, then SAR converters are better.
There are 16-bit SAR converters with megasample-range throughput.
Using one of these could possibly solve the problem with a
single converter and a huge multiplexer. (Beware, there are even
SAR converters with poor DC performance!)

The solution this way would be less expensive than with per-channel
converters, but the design is more complicated (multiplexers,
buffers, etc. with 16-bit accuracy). In any case, you'll need
to study the converter data very carefully, as very often
the datasheets are rather shy when it comes to the deficiencies
of the converters.

- Ville

-- 
Ville Voipio, Dr.Tech., M.Sc. (EE)

Ville Voipio <vvoipio@kosh.hut.fi> writes:
> sigma delta sigma delta sigma delta [...]

It's "delta sigma".
-- 
Randy Yates
Sony Ericsson Mobile Communications
Research Triangle Park, NC, USA
randy.yates@sonyericsson.com, 919-472-1124

In article <xxpfyxwb6cn.fsf@usrts005.corpusers.net>, Randy Yates wrote:

> Maybe you can enlighten me a bit here. Back in my old school/analog
> days, I was taught that settling time is inversely proportional to
> bandwidth. If I have a Fn Hz channel (from sampling at 2*Fn samples
> per second), then why wouldn't the settling time of an input be the
> same whether I used delta sigma or flash converter techniques?

If the bandwidth is the same, then there is no difference between
the converters.

But if you take a typical SAR converter, its analog bandwidth
(before the sampling stage) is typically much larger than the
sampling rate. For example, the AD7476 (1 Ms/s, 12-bit SAR ADC)
has 1 Ms/s  maximum sampling rate and 6.5 MHz full-power (3 dB)
bandwidth. This bandwidth will give LSB settling at the maximum 
sampling rate.

On the other hand, the (pseudo-analog) bandwidth of a sigma-delta
is almost exactly Fs/2. This means in this case there is 1:10
ratio between the bandwidths, and this makes the difference in
settling time.

- Ville

-- 
Ville Voipio, Dr.Tech., M.Sc. (EE)